1,431 Results for

ASIC Design Engineer Jobs in San Jose, CA

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Senior ASIC Verification Engineer CYNET SYSTEMS

San Jose, CA

$104–$110 / hour
Temporary
Contractor
Part time
Quick Apply

The successful candidate is expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects. As a nationally and locally certified Minority Business Enterprise (MBE), Cynet Systems is committed to helping organizations build high-performing teams while empowering professionals to grow rewarding careers.

27 days ago

Senior ATE Security Engineer, Amazon Leo Silicon Team Amazon Kuiper Manufacturing Enterprises LLC

Sunnyvale, CA

You will also design and build reusable, well-architected library code and tooling, such as pattern search utilities, automated sub-flow generation, and auto-generation of test programs from patterns, that improve the productivity, consistency, and quality of the entire test engineering team. You must be responsive, flexible, and able to succeed within an open, collaborative peer environment, and you will influence design, DFT, security, and manufacturing teams to ensure our products are architected for security, testability, and cost-effective high-volume manufacturing.

30+ days ago

DFT (Design for Test) Engineer ASD GLOBAL

Santa Clara, CA

$70–$75 / hour
Contractor
Quick Apply

Ability to work effectively in fast paced, high performance semiconductor programs. • 5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs.

19 days ago

Physical Design Engineer Einfochips (An Arrow electronics company)

San Jose, CA

$120,000–$140,000 / year
Contractor
Full time
Quick Apply

Contribute to the refinement of other implementation and physical design methodologies, encompassing synthesis, place and route (PnR), electromigration and IR (EMIR), power delivery network (PDN), and logical equivalence checking (LEC). Work closely with architects, RTL designers, and DFT engineers to resolve implementation and signoff issues across your blocks.

30+ days ago

Senior Embedded Software Engineer Everpure, Inc.

Santa Clara, CA

$180,000–$270,000 / year

In this role, you will be responsible for: Developing and maintaining comprehensive firmware simulation environments (e.g., QEMU) to enable shift-left testing, reducing dependency on physical hardware and accelerating time-to-market. Creating accurate, high-fidelity hardware models to abstract controller logic, communication interfaces (PCIe, NVMe), and NAND media behaviors within Pure Storage’s DirectFlash SSD Modules.

Today

ASIC Design Engineer - Digital DSP Design & Analog/Mixed-Signal Celero Communications

San Jose, California

$150,000–$250,000 / year

Strong knowledge of one or more of the following areas: - Digital Signal Processing (DSP) - High-speed SerDes - Analog/Mixed-Signal ICs - Digital communications - Optical communications • Experience working with DSP algorithms, data-path architectures, FEC, equalization, modulation/demodulation, or other high-speed communication technologies.• What You Will Bring • Bachelor’s or higher degree in Electrical Engineering, Computer Engineering, or a related field.• 5+ years of experience in digital ASIC design, with demonstrated ownership of complex ASIC blocks or subsystems.•

11 days ago

ASIC Design Engineers — Design-for-Test (DFT) & Physical Design (Synthesis and Timing) – (Experienced, Lead, or Senior) Boeing

Mountain View, California

$119,850–$162,150 / year

The Boeing Company also provides eligible employees with an opportunity to enroll in a variety of benefit programs, generally including health insurance, flexible spending accounts, health savings accounts, retirement savings plans, life and disability insurance programs, and a number of programs that provide for both paid and unpaid time away from work. Experienced, Level 3: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, engineering technology (includes manufacturing engineering technology), computer science, engineering data science, mathematics, physics or chemistry (e.g.

15 days ago

Senior ASIC Design Engineer SQL Pager

Sunnyvale, California

Experience in logic design on high-performance data center chip and integration of acquired IP blocks• Good knowledge on ASIC design and verification methodologies and flows• Hand-on experience: System Verilog, C++, Perl/Python, UVM, Synthesis, Formal Verification, Static Timing Analysis• Experience with processor design, AI/Deep Learning, PCIe/DDR, FPGA emulation• Proven track record as ASIC design on several production tape-outs• Excellent written and verbal interpersonal skills Job Responsibilities • To help develop an ASIC for our automotive and Data Center artificial intelligence computing architecture• Participating in Architecture definition and modeling, verification test plan and testbench.•

30+ days ago

ASIC Design Engineer Intern Hewlett Packard Enterprise Company

Sunnyvale, CA

Full time

Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world.

9 days ago

ASIC Design Engineer Silicon Engineering Space Exploration Technologies Corp

Palo Alto, CA

$135,000–$175,000 / year

Participate in the full ASIC/FPGA design lifecycle for Starlink projects, from high-level conceptual and architectural discussions through microarchitecture, design partitioning, and collaboration with backend/implementation teams, and assist in lab bring-up and validation. Engage in high-level architectural design for test systems to support FPGA/ASIC validation, generational interoperability, and integration with DSP/communications subsystems for comprehensive lab and on-orbit verification.

8 days ago

Senior ASIC Design Engineer Zp Group Llc

Saratoga, CA

$250,000–$290,000 / year

Keywords: ASIC, ASIC Architect, Networking ASIC, AI Networking, Design, Microarchitecture, Performance Modeling, PCIe, SerDes, Ethernet, TCP/IP, RoCE, High-Speed Datapath, Silicon Validation, System-on-Chip, SoC Architecture, Hardware Design, IP Integration, Physical Design, Firmware Interface, Chip Architect, DPU, CPU, SOC. Qualifications for Senior ASIC Design Engineer: 10+ years of experience as an Chip Architect, preferably in networking or high-performance computing (Routers, Switches, GPU, CPU, Data Center, etc).

30+ days ago

ASIC Design Engineer - Pixel IP Apple Inc

Sunnyvale, CA

Apply your knowledge of computer architecture and digital design to create digital signal processing pipelines for capturing, improving, compressing, decompressing, and displaying digital still images and video. In this front-end design role, your tasks will include: Design digital hardware by writing high-quality RTL or using a high-level synthesis methodology, with embedded assertions and cover points.

30+ days ago

ASIC Design Engineer 2 Hewlett Packard Enterprise Co

Sunnyvale, CA

$105,500–$213,500 / year

30+ days ago

ASIC Design Engineer 2 Hewlett Packard Enterprise

Sunnyvale, California

30+ days ago

ASIC Design Engineer Epia Neuro

Alameda, California

Bachelor's degree in Electrical Engineering/Computer Science, plus relevant industry experience in ASIC design — or a Master's/PhD with hands-on ASIC design experience through university lab or project work. The company’s initial focus is stroke-related motor impairment, with expansion in cognitive decline and other neurological disorders, focusing on long-term solutions for the growing aging population.

30+ days ago

ASIC Design Engineer - Neural Engine DMA Apple Inc

Sunnyvale, CA

ANE DMAs scale and complexity means grappling with: decomposing tensor surfaces into efficient fetch sequences; maximizing throughput under real-world memory system conditions; maintaining data consistency across concurrent streams; multi-level arbitration and ordering correctness; sizing latency-tolerant buffering structures; and security and state isolation. In this front-end design role, your work will include: Taking end-to-end ownership of DMA subsystems through the full cycle: microarchitecture specification, RTL implementation, front-end signoff (synthesis, timing closure, area and power analysis, linting, LEC), and design verification closure.

30+ days ago

ASIC Design and Integration Engineer - Silicon Security Apple Inc

Cupertino, CA

Your responsibilities will include: Architecting and designing state-of-the-art security features, working closely with Platform Architecture, Design Verification to deliver high performance, area and power efficient RTL Blocks on time. In this role, you will design the state-of-the-art hardware defenses that prevent complex side channel attacks and ensure the integrity of our customers most sensitive data across Apples product line.

30+ days ago

ASIC Design Engineer - IP Integration & Implementation Apple Inc

Sunnyvale, CA

Industry exposure to and knowledge of ASIC/FPGA design methodology, especially logic synthesis, static timing analysis, logic equivalence checking, and working with physical design teams for floorplanning and timing closure. Bachelors degree and 10+ years of relevant industry experienceDeep experience in IP/SoC design, integration at the chip or subsystem level, and implementation.

30+ days ago

Principal ASIC Design Engineer Hewlett Packard Enterprise Co

Sunnyvale, CA

$174,000–$352,500 / year

Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. Determines architecture and logic design, design verification through software developed for component and system simulation and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits.

30+ days ago

Sr. ASIC Design Engineer Silicon Engineering Space Exploration Technologies Corp

Palo Alto, CA

$175,000–$280,000 / year

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). ITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.

8 days ago

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ASIC Design Engineer Jobs in San Jose, CA

Senior ASIC Verification Engineer CYNET SYSTEMS

Senior ATE Security Engineer, Amazon Leo Silicon Team Amazon Kuiper Manufacturing Enterprises LLC

DFT (Design for Test) Engineer ASD GLOBAL

Physical Design Engineer Einfochips (An Arrow electronics company)

Senior Embedded Software Engineer Everpure, Inc.

ASIC Design Engineer - Digital DSP Design & Analog/Mixed-Signal Celero Communications

ASIC Design Engineers — Design-for-Test (DFT) & Physical Design (Synthesis and Timing) – (Experienced, Lead, or Senior) Boeing

Senior ASIC Design Engineer SQL Pager

ASIC Design Engineer Intern Hewlett Packard Enterprise Company

ASIC Design Engineer Silicon Engineering Space Exploration Technologies Corp

Senior ASIC Design Engineer Zp Group Llc

ASIC Design Engineer - Pixel IP Apple Inc

ASIC Design Engineer 2 Hewlett Packard Enterprise Co

ASIC Design Engineer 2 Hewlett Packard Enterprise

ASIC Design Engineer Epia Neuro

ASIC Design Engineer - Neural Engine DMA Apple Inc

ASIC Design and Integration Engineer - Silicon Security Apple Inc

ASIC Design Engineer - IP Integration & Implementation Apple Inc

Principal ASIC Design Engineer Hewlett Packard Enterprise Co

Sr. ASIC Design Engineer Silicon Engineering Space Exploration Technologies Corp

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