Advanced packaging technologies including TSV/TGV, fan-out wafer level packaging (FOWL), package-on-package (PoP), system-in-package (SiP), wire bond packaging, embedded component packaging, vertical interconnect technologies (VICs), multi-chip modules (MCM), compression molding technologies, and related advanced semiconductor packaging methodologies. The Principal Microelectronic Packaging Engineer will lead concept design, guide Mechanical Engineers, Electrical Engineers and ECAD Designers as part of a multi-functional advanced technology development team to create new and innovative ideas for microelectronic circuits, assemblies, and packaging.