Physical Design Engineer - Block Level, Subsystem Implementation Etched AIPhysical Design Engineer - Block Level, Subsystem ImplementationSan Jose, CAYou will drive Block-level & Subsystem PPA Optimization, and collaborate closely with RTL designers to provide actionable feedback, ensuring we iterate at unprecedented speeds to bring our products to market. Experience with UPF-based low power design methodology, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysis.
Senior Analog IC Design Engineer Lattice Semiconductor CorporationSenior Analog IC Design EngineerSan Jose, CAProven design experience in most of the following analog, mixed-signal circuits: SerDes receivers/transmitters, low-jitter PLLs, oscillators, phase interpolators, ADC/DAC, high speed clock distribution, bandgap/bias, and voltage regulators. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry.
IC/RTL Design Engineer LumilensIC/RTL Design EngineerSan Jose, CaliforniaPower- and timing-aware design — managing block activity, clock-gating, pipelining, and retiming; partner with the backend team on physical closure for your blocks. You design and implement the digital front-end RTL at the heart of the chip — including the high-speed datapath that moves data between UCIe and the optical front end.
Physical Design Engineer Etched AIPhysical Design EngineerSan Jose, CAwill own block-level implementation and verification, drive timing closure and PPA optimization, supervise 3rd party design work, and help improve our design flows and iteration speed. Experience with UPF-based low power design methodology, power verification,synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysis.
Senior Design Engineer ChipAgentsSenior Design EngineerSan Jose, California$180,000–$350,000 / yearThis role designs experiences across CLI, web, IDE, desktop, and other agent-native interfaces, not simply implementing designs or requirements created by someone else. Work alongside a world-class technical team and an advisory board of EDA legends, with real product, real customers, and real scale already in production.
Senior Principal Analog Design Engineer QorvoSenior Principal Analog Design EngineerSan Jose, CA$193,100–$251,100 / yearIn this role, you will drive architecture, design, and validation of industry-leading analog power ICs, collaborating closely with cross-functional global teams to deliver world-class products that set new benchmarks in efficiency, reliability, and performance. Qorvo's fast-growing Power Management division is at the forefront of innovation in Power Loss Protection, PMICs, Motor Control, and Battery Management solutions, serving a diverse range of applications across Mobile, Consumer, IoT, and Industrial markets.
NewDesign Engineer GumloopDesign EngineerSan Francisco, CaliforniaYou’ll own key user-facing surfaces from early concept through final implementation, using strong product judgment, thoughtful interaction design, and excellent frontend execution to make complex workflows feel simple. You’ll also help evolve our design system and establish reusable patterns that make the product better over time, and allow the rest of our engineering team to build beautiful interfaces.
NewSenior Electrical Power Design Engineer, LV Electronics General MotorsSenior Electrical Power Design Engineer, LV ElectronicsSunnyvale, CA$106,600–$163,400 / yearIn-vehicle electronics is a fast-growing technology in the global automotive industry featuring many cutting-edge technologies such as Compute, body and zone controllers, multi-view cameras, Gig+Ethernet, PCIe, digital/analog interfaces and more. Build, test, and validate power delivery systems on prototypes, using lab equipment like oscilloscopes, power analyzers, and thermal cameras to ensure they meet design specifications.
NewSenior Module Design Engineer QorvoSenior Module Design EngineerSan Jose, CA$115,600–$150,500 / yearQorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Module level design from concept to production, including integration of PAs, LNAs, filters, and switches into highly compact multilayer modules.
AI Hardware Design Engineer TechDigitalAI Hardware Design EngineerSanta Clara, CADevelop forward surrogate models for CVD/ALD/etch chambers mapping geometry, gas chemistry, flow, temperature, and power to film-uniformity, step-coverage, particle behavior, and thermal outcomes. Implement inverse-design workflows where target performance specifications generate feasible chamber geometries, showerhead/baffle designs, and process conditions via generative or adjoint/topology-optimization methods.
NewPrincipal Physical Design Engineer Hewlett Packard EnterprisePrincipal Physical Design EngineerSunnyvale, CaliforniaPlease note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world.
NewPrincipal ASIC Design Engineer Hewlett Packard EnterprisePrincipal ASIC Design EngineerSunnyvale, CaliforniaPlease note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. Determines architecture and logic design, design verification through software developed for component and system simulation and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits.
Senior/Principal Analog & Mixed Signal Design Engineers LumilensSenior/Principal Analog & Mixed Signal Design EngineersSan Jose, CaliforniaWe are seeking an experienced Analog / Mixed-Signal IC Design Engineer to design and deliver high-performance Driver and TIA circuits in BiCMOS and advanced semiconductor nodes. This role involves end-to-end ownership of analog building blocks, from architectural definition through silicon validation, in a fast-moving and technically rigorous environment.
Design Engineer BraintrustDesign EngineerSan Francisco, CaliforniaOur primary users are engineers and PMs at innovative tech companies who spend multiple hours a day using our product to run experiments, analyze user behavior, and try out new ideas, seamlessly shifting between their code and our UI. By actively applying intelligence to agent traces and automatically surfacing the most critical patterns, Braintrust gives teams the visibility to understand how agents behave in production and the tools to improve them.
Electrical Engineer - Direct Hire PEAK Technical StaffingElectrical Engineer - Direct HireMilpitas, CAAssist project managers with all aspects of projects from proposal to final engineered design, ensuring high-quality outcomes and client satisfaction. Candidate Privacy To read our Candidate Privacy Information Statement, which explains how we will use your information, please navigate to https://peaktechnical.com/privacy-policy/and https://peaktechnical.com/ca-residents-privacy-rights/
MTS - Design Engineer Ironsite AIMTS - Design EngineerSan Francisco, CaliforniaIronsite is backed by leading investors (8VC, South Park Commons, Saga Ventures) and prominent operators across technology and construction, including Eric Schmidt, Jeff Dean, Jeff Rothschild, Mark Leslie, Scott Wu, Eric Glyman, Karim Atiyeh, Russell Kaplan, and others, alongside over a dozen construction industry operators who have joined us as partners in building this. We are accelerating the speed, efficiency, and predictability of construction, especially for complex, mission-critical infrastructure projects, including data centers, LNG facilities, sports stadiums, hospitals, and other large-scale developments, by training AI models on egocentric construction footage and labor productivity data.
Sr. Physical Design Engineer LumilensSr. Physical Design EngineerSan Jose, CaliforniaIn this role, you will own physical implementation from RTL to GDSII, drive timing and power closure for ultra-high-speed designs, and work closely with RTL, STA, IP, and verification teams to solve complex implementation challenges unique to advanced-node and high-speed transceiver architectures. Advanced Physical Design: Apply physical design techniques for multi-voltage and multi-frequency domains, hierarchical implementation, physical-aware synthesis, congestion mitigation, skew optimization, and RC extraction-aware placement and routing.
Staff Data Center Electrical Engineer Super Micro Computer, Inc.Staff Data Center Electrical EngineerSan Jose, CA$175,000–$200,000 / yearAbout Supermicro: Supermicro is a Top Tier provider of advanced server, storage, and networking solutions for Data Center, Cloud Computing, Enterprise IT, Hadoop/ Big Data, Hyperscale, HPC and IoT/Embedded customers worldwide. The engineer will apply expertise across voltage systems, coordinate with mechanical, civil, and controls teams, and work directly with consultants, utilities, and construction partners to deliver efficient, reliable, cost-effective, and compliant data centers.
Sr. Power Electronics Engineer 1st Avenue PowerSr. Power Electronics EngineerMountain View, CaliforniaTom’s family office investment firm, 1st Avenue Capital, is building teams for the next generation of advanced solar power system architecture and AI to aggressively drive down the cost of and equitable access to clean and reliable energy.[1] 1st Avenue’s advanced large scale power systems are addressing the increasing inadequacy of the grid to meet the massively growing power demands of the digital economy, while its intelligent distributed solar utilities are leapfrogging the grid to provide equitable access to inexpensive, clean and reliable power to underserved communities around the world. 1AP is looking for a Senior Power Electronics Engineer to lead the design and development of advanced power conversion systems from concept to production The ideal candidate will have a strong background in power conversion topologies, digital control implementation, and product development, along with a proven ability to drive projects from initial design through validation and deployment.
Senior Asic Design Engineer NvidiaSenior Asic Design EngineerSanta Clara, CAPrior experience building arbiters, shared buffers, virtual channels, interconnection routing policies/deadlock avoidance, Highly proficient in logic design, Verilog, and/or System-Verilog, with a solid understanding of Computer Architecture. What you'll be doing: As a key member of our design team, you will be responsible for the micro-architecture and build implementation of GPU memory systems units such as caches, coherency, complex pipelines, arbiters, or interconnect networks.