Senior Software Development Engineer - Shopping Graph ID.meSenior Software Development Engineer - Shopping GraphMountain View, CA$190,978–$214,052 / yearThe Shopping Graph team provides the primitives for merchant registration, identity-gated discounts, resource management, and policy enforcement-enabling both internal applications and external developers to build trusted, identity-powered commerce experiences. The annual base salary listed does not include a company bonus, incentive for sales roles, equity and benefits which will be determined based on experience, skills, education, relevant training, geographic location and role.
Research Scientist / Engineer, Functional Ultrasound Imaging Astera InstituteResearch Scientist / Engineer, Functional Ultrasound ImagingAlameda, CaliforniaFrom implementing the imaging system and designing experiments to analyzing large-scale datasets and building functional brain atlases, you'll help create one of the world's most advanced platforms for mesoscale imaging of the primate brain. We are seeking an exceptional Research Scientist or Research Engineer to lead the development of a next-generation functional ultrasound imaging (fUSI) platform for whole-brain imaging in awake, behaving primates.
Sr. Staff CPU Physical Design CAD Engineer Qualcomm IncSr. Staff CPU Physical Design CAD EngineerSanta Clara, CA$198,700–$298,100 / yearMinimum Qualifications: Bachelor''s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. Master''s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
CPU Server Physical Design Engineer Qualcomm IncCPU Server Physical Design EngineerSanta Clara, CA$167,100–$250,700 / yearMinimum Qualifications: Bachelor''s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. Master''s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Senior Software Safety Engineer AeroVect Technologies IncSenior Software Safety EngineerSouth San Francisco, CAWorking under the close guidance and supervision of the Head of Safety, the Senior SW Safety Engineer will execute core safety lifecycle tasks across AeroVect's software and hardware platforms: System Safety Analysis: Perform hazard identification and risk assessments (HARA, FMEA, FTA, STPA) on the autonomous software architecture and vehicle operation concepts. Requirements Derivation: Derive, specify, and trace functional and technical safety requirements (FSRs / TSRs) for both supervised autonomy (safety driver present) and SDO unsupervised autonomy (driverless).
Senior System Safety Engineer AeroVect Technologies IncSenior System Safety EngineerSouth San Francisco, CAWorking under the close guidance and supervision of the Head of Safety, the Senior Safety Engineer will execute core safety lifecycle tasks across AeroVect's software and hardware platforms: System Safety Analysis: Perform hazard identification and risk assessments (HARA, FMEA, FTA, STPA) on the autonomous system architecture and vehicle operation concepts. Proven mastery of FIT rate modeling, component failure rate calculation methods (SN 29500, IEC 61709, MIL-HDBK-217), and FMEDA workflows.
ASIC Design Verification Engineer Qualcomm IncASIC Design Verification EngineerSanta Clara, CA$107,400–$161,200 / yearPrincipal Duties & Responsibilities: Applies ASIC knowledge to assist and support the defining, modeling, designing (digital and/or analog), optimizing, verifying, validating, implementing, and documenting of IP (block/SoC) development for a variety of high performance, high quality, low power products. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products.
Principle Design Engineer (ADC expertise) Monolithic Power Systems IncPrinciple Design Engineer (ADC expertise)San Jose, CAJob Description: As a Principal design engineer, you will be responsible for the full cycle of our high-resolution ADC products, from architecture to design, simulation, layout supervision and post-layout verification. Self-motivated, willing to learn new technologies, & capable of working effectively within a group of individuals across multiple disciplines.
GPU DV Engineer Qualcomm IncGPU DV EngineerSanta Clara, CA$182,200–$273,400 / yearMinimum Qualifications: Bachelor''s degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience. Master''s degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 3+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
Sr. Engineer, Photonics Reliability Ayar Labs IncSr. Engineer, Photonics ReliabilitySan Jose, CA$170,000–$200,000 / yearReliability Testing: Design, execute, and oversee accelerated aging tests, environmental tests (temperature cycling, humidity, shock, vibration), and operational life tests on photonic components and modules. Backed by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures.
NewPhotonic Engineer, Senior Qualcomm IncPhotonic Engineer, SeniorSanta Clara, CA$139,400–$209,200 / yearMinimum Qualifications: Bachelor''s degree in Electrical Engineering with 3+ years of experience with designing RF/Analog circuits for wireless products (e.g., LNA''s, PLL''s) and 2+ years of ASIC design, verification, or related work experience. Preferred Qualifications: 2+ years of Co-Packaged Optics (CPO) design experience - chip-to-chip optical coupling, CPO-specific constraints, or tape-out in a CPO-targeted node.
Sr. Engineer, Embedded Firmware Ayar Labs IncSr. Engineer, Embedded FirmwareSan Jose, CA$160,000–$192,000 / yearEssential Functions: Firmware Architecture: Collaborate closely with analog/mixed-signal, digital, and photonic block designers to develop sophisticated control algorithms for our photonic circuits and establish the micro-architecture and embedded requirements for our multi-chip package systems. Backed by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures.
Staff Engineer - Power Management IC Design Qualcomm IncStaff Engineer - Power Management IC DesignSanta Clara, CA$153,200–$229,800 / yearDemonstrated experience in one or more of the following areas: Power Electronics, Control Theory, Multiphase Buck Controllers, High‑Accuracy Analog Front Ends, High‑Speed or High‑Drive Circuits, Very Low Power or Precision References, Electro‑Migration and Transistor Reliability, Behavioral Modeling, or Mixed‑Signal Verification Techniques. Requires expertise in one or more of the following engineering disciplines: power electronics (switch‑mode and linear), control theory, mixed‑signal circuit design, high‑speed and high‑drive circuits, power stage interfaces, electro‑migration and transistor reliability, and behavioral modeling.
Sr. Staff Engineer, Analog/Mixed-Signal Design Ayar Labs IncSr. Staff Engineer, Analog/Mixed-Signal DesignSan Jose, CA$180,000–$223,000 / yearBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. As an Analog and Mixed Signal Design Engineer, you will design various blocks such as oscillators, high speed transmitters/receivers, biasing circuits, linear regulators, ADCs/DACs, and others.
Firmware Development Engineer, Sr. Staff Qualcomm IncFirmware Development Engineer, Sr. StaffSanta Clara, CA$180,600–$271,000 / yearAs a CPU Power Management FW Developer, this role is responsible for working with a team on the enablement of power management solutions for Qualcomm's custom CPUs. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Principal Scientist - Marine Acoustics Sofar Ocean Technologies IncPrincipal Scientist - Marine AcousticsSan Francisco, CARemote$137,000–$185,000 / yearD. in acoustics, ocean engineering, electrical engineering, applied physics, oceanography, or a related field, but we will consider highly qualified candidates of any education level with equivalent experience. The Role: Sofar designs, builds, and deploys ocean sensing networks at a global scale that provide unique observational knowledge of the ocean environment.
Principal Research Scientist - RF MMIC Design Qorvo IncPrincipal Research Scientist - RF MMIC DesignSan Jose, CA$148,100–$192,500 / yearRequired Technical Skills and Experience: Recent and relevant experience designing III-V microwave/millimeter-wave RF/MMIC amplifiers, switches, phase shifters, attenuators, time-delay units (TDUs), hybrid multichip modules, or transmit/receive front-end modules (FEMs). Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense.
Senior Plant Engineer, Dixon - Site Services Genentech IncSenior Plant Engineer, Dixon - Site ServicesSouth San Francisco, CA$109,500–$203,300 / yearIn this strategic role, you won't just maintain systems-you'll be the principal technical authority driving capital projects from conception through commissioning, leading reliability initiatives that prevent costly downtime, and ensuring our facilities operate at peak efficiency and safety. This is a unique opportunity to combine hands-on technical expertise with strategic leadership, working autonomously as a trusted subject matter expert who directly influences multi-million-dollar investments and operational decisions.
CPU Synthesis CAD Engineer Qualcomm IncCPU Synthesis CAD EngineerSanta Clara, CA$198,700–$298,100 / yearMinimum Qualifications: Bachelor''s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. Master''s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Principal Presales Solution Architect (Agentic Identity) AppViewXPrincipal Presales Solution Architect (Agentic Identity)San Francisco, CATrusted by global enterprises across financial services, healthcare, and technology, AppViewX is recognized as a leader in the IDC 2026 MarketScape for Certificate Lifecycle Management and KuppingerCole's 2025 Non-Human Identity Management Leadership Compass. As Principal Architect, this person personally owns the technical backbone of AIS pre-sales: the Use Case Map, demo environments, POC frameworks, and reference architectures that the rest of the global SE team (AMS, EMEA, APAC) builds on.