Highly desirable for a candidate to have a background in at least one of the following areas: Singulation, Photolithography, Solder Bumping, PVD and/or CVD Thin Films, Dry Etch, Wet Etch /Wafer Clean, Diffusion, Bond, Electroplate (ECD), CMP, or Metrology, Probe/Test (some areas may be combined). Responsibilities: Provide technical leadership and management of 200MM and 300MM Semiconductor processing equipment in Support of Advanced Packaging processes including Fan Out Wafer Level Packaging, Interposers, Hybrid Wafer to Wafer bonding, and Die to Wafer Bonding.