Sr. Soc/Asic Physical Design Engineer (Silicon Engineering) Space Exploration TechnologiesSr. Soc/Asic Physical Design Engineer (Silicon Engineering)Irvine, CA$165,000–$260,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Design Verification Engineer (Silicon Engineering) Space Exploration TechnologiesDesign Verification Engineer (Silicon Engineering)Irvine, CA$125,000–$145,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Principal Design Verification Engineer (Silicon Engineering) Space Exploration TechnologiesPrincipal Design Verification Engineer (Silicon Engineering)Irvine, CA$210,000–$335,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
NewPrincipal Design Verification Engineer (Silicon Engineering) SpaceXPrincipal Design Verification Engineer (Silicon Engineering)Irvine, CA$210,000–$335,000 / yearWe are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
NewPhysical Design Engineer II (Silicon Engineering) SpaceXPhysical Design Engineer II (Silicon Engineering)Irvine, CA$145,000–$195,000 / yearWe are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
NewSr. SOC/ASIC Physical Design Engineer (Silicon Engineering) SpaceXSr. SOC/ASIC Physical Design Engineer (Silicon Engineering)Irvine, CA$165,000–$260,000 / yearWe are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
NewElectrical Design and Analysis Engineer (Associate or Mid-Level) The Boeing CoElectrical Design and Analysis Engineer (Associate or Mid-Level)Los Angeles, CA$98,600–$133,400 / yearBasic Qualifications (Required Skills/ Experience): Bachelor of Science degree in Engineering (with a focus in Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statement. The Boeing Company also provides eligible employees with an opportunity to enroll in a variety of benefit programs, generally including health insurance, flexible spending accounts, health savings accounts, retirement savings plans, life and disability insurance programs, and a number of programs that provide for both paid and unpaid time away from work.
ASIC / FPGA Digital Design Engineer - (Lead or Senior) The Boeing CoASIC / FPGA Digital Design Engineer - (Lead or Senior)Los Angeles, CA$146,200–$197,800 / yearTypical Education/Experience: Lead, Level 4: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, engineering technology (includes manufacturing engineering technology), computer science, engineering data science, mathematics, physics or chemistry (e.g. Programs may include next-generation satellite and space systems, modules supporting NASA missions, Space Launch System (SLS)-related technologies, commercial and military aircraft platforms, autonomous aviation technologies, and emerging digital architectures supporting future aerospace systems.
NewStartup Design Accelerator (Remote) UX WomanStartup Design Accelerator (Remote)Los Angeles, CARemoteTell a compelling story about users by showcasing user types, personas, stakeholder maps, journey maps, process maps, service blueprints, ideation matrixes, sketches, wireframes, UX workflows, prototypes and other visual deliverables. Lead discovery research by managing user recruitment, creating research plans, writing interview guides, leading 8-16 discovery interviews, and synthesizing interview insights.
RFIC - PLL Design Engineer Apple IncRFIC - PLL Design EngineerIrvine, CAOur wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by a best-in-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. RFIC - PLL Design Engineer within the Wireless Radio team, you will be at the center of a wireless SoC design group with a critical impact on getting Apple's state-of-the-art wireless connectivity solutions into hundreds of millions of products.
Design Characterization Engineer Omnivision TechnologiesDesign Characterization EngineerIrvine, CA$110,600–$140,000 / yearWork cross‑functionally with process, applications, production, and quality teams to transition new designs into production and resolve yield, reliability, and overall product quality issues. In this role, you will characterize and optimize CMOS image sensor performance, collaborate closely across engineering disciplines, and help deliver industry‑leading sensor products with exceptional quality.
VP of Design On Board ExperientialVP of DesignLos Angeles, CAON BOARD EXPERIENTIAL MARKETING On Board Experiential (OBE) is an award-winning, full-service, experience-led agency that creates meaningful brand experiences worldwide. We work out of our homes and physical offices in San Francisco, Los Angeles, and NYC, or wherever our adventures take us! Our clients include Nike, Meta, JPM...
ASIC Design Engineer – DSP / Analog / SerDes Celero CommunicationsASIC Design Engineer – DSP / Analog / SerDesIrvine, California$150,000–$250,000 / yearStrong knowledge of one or more of the following areas: - Digital Signal Processing (DSP) - High-speed SerDes - Analog/Mixed-Signal ICs - Digital communications - Optical communications • Experience working with DSP algorithms, data-path architectures, FEC, equalization, modulation/demodulation, or other high-speed communication technologies.• What You Will Bring • Bachelor’s or higher degree in Electrical Engineering, Computer Engineering, or a related field.• 5+ years of experience in digital ASIC design, with demonstrated ownership of complex ASIC blocks or subsystems.•
Digital Design Lead PhizenixDigital Design LeadIrvine, CA$180,000–$200,000 / yearThis role leads the digital design effort across high-speed interface and memory subsystem IPs, partnering with architecture, verification, and physical design teams to deliver silicon-ready designs. We are seeking experienced Digital Design Leads to drive RTL design and verification for next-generation semiconductor products.
Sustainable Design Engineer Leader, Mission Critical HKS IncSustainable Design Engineer Leader, Mission CriticalLos Angeles, CASupports DesignGreen team and Enterprise leadership to expand and further integrate design performance, building energy modeling and building operation modeling for all projects across the firm, including informing design decisions by predicting a building's performance with respect to energy efficiency, passive and active design strategies, building massing, daylight availability, glare control, shading analysis, thermal comfort, natural ventilation, mechanical systems alternatives, loads analysis, renewable energy systems integration and similar design factors/elements throughout the project's life cycle. Responsibilities: Oversees the whole-building dynamic thermal and energy building simulation models for various building types and scales, including advanced mechanical systems evaluations, architectural response to enhancing daylighting, lighting control systems and detailed thermal and moisture response of building façade components.
Design Professional II - Facades HKS IncDesign Professional II - FacadesLos Angeles, CACreative, open-minded, embodies professionalism and accountability, provides and receives rational feedback, uses respectful language, and is ready to surmount conventional thinking. Proficiency with optical, lighting, and daylighting design software such as RADIANCE, Climate Studio, EVALGLARE, Acelerad, Ladybug Tools, ALFA, LARK preferred.
RFIC Design Engineer Apple IncRFIC Design EngineerIrvine, CAIt transforms the user experience at the product level, all of which is driven by an outstanding vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering! This includes design of LNAs and PAs, PLL/VCO/DCO/LOGEN blocks, mixers, baseband filters and amplifiers, data converters and calibration methods associated with such high performance wireless systems.
Digital Design Engineer SyntiantDigital Design EngineerIrvine, California$190,000–$240,000 / yearIndividual compensation decisions are based on a number of factors, including but not limited to previous experience and skills acquired prior to joining Syntiant, cost of living in the assigned work location, assigned schedule, and salaries of similarly situated peers at the company. The company’s purpose-built silicon and hardware-agnostic models are being deployed globally to power edge AI speech, audio, sensor and vision applications across a wide range of consumer and industrial use cases, from earbuds to automobiles.
SerDes Circuit Design Engineer Apple IncSerDes Circuit Design EngineerCalifornia, CAYou will work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, high-speed analog signal chain, mixed-signal calibration and algorithms) with best in class power, performance, and area (PPA). Understanding and experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters.
Workplace Design Manager, Americas Apple IncWorkplace Design Manager, AmericasCalifornia, CAWe develop and manage Apple's global real estate portfolio, lead all related capital construction projects, provide outstanding facilities and site services, develop and lead sustainability initiatives to reduce the environmental impact of all Apple facilities, including commute and renewable energy programs, and do everything we can to ensure the health and safety of all Apple personnel, facilities, and customers in our facilities around the world. We are seeking an experienced, collaborative, and detail orientated design professional with a passion for workplace design to join our team as a Design Manager to oversee and manage design related elements for workplace projects in the Americas region.