Circuit Design Engineer - Library Apple IncCircuit Design Engineer - LibraryBeaverton, ORIn this highly visible role, you will be at the heart of a processor design effort, working with the custom digital circuits team and library development, making a critical impact in delivering products to market quickly. You will drive concepts of transistor level circuit design, modeling and performance analysis, collaborating with all fields, playing a strategic role of getting functional products to millions of customers quickly.
Vice President, Global Footwear Design & Innovation Arc'teryx Equipment Inc.Vice President, Global Footwear Design & InnovationPortland, OR$224,000–$336,000 / yearIn addition to base pay, Arc'teryx supports people through benefits designed to sustain both work and life: Health & wellbeing - Extended health, dental, and vision coverage, including mental health support, fertility benefits, and a 24/7 Employee Assistance Program (EAP). You lead a world-class global team and partner deeply across Design, Product Management, Development, Sourcing, Manufacturing, Merchandising, and Brand to deliver footwear that redefines what's possible in the outdoors.
Senior ASIC Design Engineer - GPU NVIDIA CorpSenior ASIC Design Engineer - GPUHillsboro, ORThe base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits. Come, join our GPU ASIC team and help build the real-time, cost-effective computing platform driving our success in this exciting and quickly growing field.
Senior Asic Design Engineer - GPU NvidiaSenior Asic Design Engineer - GPUHillsboro, ORThe base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits. Come, join our GPU ASIC team and help build the real-time, cost-effective computing platform driving our success in this exciting and quickly growing field.
Lead Electrical Engineering Technician - Nuclear Design Black & Veatch Holding CoLead Electrical Engineering Technician - Nuclear DesignTualatin, OR$133,881–$223,575 / yearThe Virtual Design & Data Solutions (VDDS) Staff Engineering Technician plays a key role in supporting the development of high‑quality engineering 2D/3D deliverables for these complex infrastructure projects. This opportunity with Black & Veatch offers the chance to collaborate with multidisciplinary project teams within the Power Providers Market Sector, supporting Nuclear projects and building critical infrastructure for today's and tomorrow's challenges.
Vice President, Global Footwear Design & Innovation Arc'Teryx Equipment Inc.Vice President, Global Footwear Design & InnovationPortland, OR$224,000–$336,000 / yearIn addition to base pay, Arc'teryx supports people through benefits designed to sustain both work and life: Health & wellbeing- Extended health, dental, and vision coverage, including mental health support, fertility benefits, and a 24/7 Employee Assistance Program (EAP). You lead a world-class global team and partner deeply across Design, Product Management, Development, Sourcing, Manufacturing, Merchandising, and Brand to deliver footwear that redefines what's possible in the outdoors.
RTL Design Engineer Intel CorpRTL Design EngineerHillsboro, OR$105,650–$200,340 / yearQualifications: Minimum Qualifications • The candidate must have a Bachelor's Degree in Electrical or Computer Engineering or any STEM related education with at least 2+ years of experience -OR- Master''s Degree in Electrical or Computer Engineering • At least 1+ years of coursework or experience in the following areas: o Basic Logic Design o Microprocessors o Computer Architecture o Digital design and RTL coding o Verilog/SystemVerilog and/or VHDL o Synthesis tools (Design Compiler, Genus) o Scripting languages (Python, Perl, TCL) Preferred Qualifications • Experience with advanced verification methodologies (UVM, OVM) • Knowledge of low-power design techniques • Understanding of physical design constraints and timing closure • Experience with version control systems (Git, Perforce) • Experience with simulation tools (ModelSim, VCS, Xcelium). Job Details: Job Description: Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs.
FPGA Design Engineer (MTD, Tualatin, OR) Teradyne IncFPGA Design Engineer (MTD, Tualatin, OR)Tualatin, OR$123,100–$196,900 / yearOur test instrumentation supports the world's most advanced memory technologies, combining state-of-the-art digital and analog designs, cutting-edge ASIC/FPGA technologies, liquid cooling, and high-performance signal delivery. Teradyne's Memory Test Division (MTD) seeks a motivated and technically driven FPGA Engineer to support the development of our growing portfolio of cutting-edge memory test solutions.
Senior FPGA Design Engineer (MTD, Tualatin, OR) Teradyne IncSenior FPGA Design Engineer (MTD, Tualatin, OR)Tualatin, OR$154,900–$247,800 / yearOur test instrumentation supports the world's most advanced memory technologies, combining state-of-the-art digital and analog designs, cutting-edge ASIC/FPGA technologies, liquid cooling, and high-performance signal delivery. Teradyne's Memory Test Division (MTD) seeks a motivated and technically driven FPGA Engineer to support the development of our growing portfolio of cutting-edge memory test solutions.
Senior Fpga Design Engineer (Mtd, Tualatin, OR) Teradyne, Inc.Senior Fpga Design Engineer (Mtd, Tualatin, OR)Tualatin, OR$154,900–$247,800 / yearOur test instrumentation supports the world's most advanced memory technologies, combining state-of-the-art digital and analog designs, cutting-edge ASIC/FPGA technologies, liquid cooling, and high-performance signal delivery. Teradyne's Memory Test Division (MTD) seeks a motivated and technically driven FPGA Engineer to support the development of our growing portfolio of cutting-edge memory test solutions.
Fpga Design Engineer (Mtd, Tualatin, OR) Teradyne, Inc.Fpga Design Engineer (Mtd, Tualatin, OR)Tualatin, OR$123,100–$196,900 / yearOur test instrumentation supports the world's most advanced memory technologies, combining state-of-the-art digital and analog designs, cutting-edge ASIC/FPGA technologies, liquid cooling, and high-performance signal delivery. Teradyne's Memory Test Division (MTD) seeks a motivated and technically driven FPGA Engineer to support the development of our growing portfolio of cutting-edge memory test solutions.
Principal Engineer, Digital IC Design and Architecture Analog Devices IncPrincipal Engineer, Digital IC Design and ArchitectureBeaverton, OR$157,080–$227,460 / yearADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. Responsibilities: Digital Architecture and Design: Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including Gigabit‑speed serial interfaces and video and data routing solutions.
Design Engineer Taylor CorpDesign EngineerBeaverton, OR$80,000–$95,000 / yearThe actual base salary offered depends on a variety of factors, which may include as applicable, the qualifications of the individual applicant for the position, years of relevant experience, specific and unique skills, level of education attained, certifications or other professional licenses held, and the location in which the applicant lives and/or from which they will be performing the job. We are seeking a creative Industrial Designer to develop innovative retail environments, experiential displays, trade show exhibits, branded fixtures, architectural elements, and custom products.
Mixed Signal Logic Design Engineer IntelMixed Signal Logic Design EngineerHillsboro, OregonJob Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations: US, Arizona, Phoenix, US, California, Santa Clara Business group: The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). BS degree in Electrical Engineering or Computer Engineering or similar field of study with 4+ years relevant experience -OR- MS degree in Electrical Engineering or Computer Engineering or similar field of study with 3+ years relevant experience.
Lead, Footwear Computational Design NIKE IncLead, Footwear Computational DesignBeaverton, ORThe Digital Design Studio, part of the Advanced Digital Creation Studio, is dedicated to evolving how product is designed, pairing advanced algorithmic and geometric exploration with emerging tools like Generative AI to expand the design space and shape new ways of working. You will lead advanced algorithm and geometry creation across product concepts, owning the path from creative intent to manufacturable output, including toolpath design and machine-code generation where the geometry meets the method of make.
ASIC Design and Integration Engineer Apple IncASIC Design and Integration EngineerBeaverton, ORApple's Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer to join our dynamic group. Minimum of BS + 10 years relevant industry experienceExperience: 8+ years of proven experience in ASIC design, including RTL design and verification.
Circuits Physical Design Engineer Apple IncCircuits Physical Design EngineerBeaverton, ORWe are looking for applicants with 2+ years of proven experience and strong understanding of the RTL2GDSII flow and concepts related to synthesis, place & route, CTS, timing convergence, layout closure. Imagine yourself at the center of our SOC design effort, collaborating with all fields, playing a strategic role of getting functional products to millions of customers quickly.
Design Verification Engineer Apple IncDesign Verification EngineerBeaverton, ORThis is a critical job within Apples Hardware Technology and wed love to have you join us As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all subject areas (vertical product model). Joining SOC DV allows you to focus deeply on one main IP or expand your breadth as you work on a collection of subsystems.
CPU Design Timing Engineer Apple IncCPU Design Timing EngineerBeaverton, ORIn this role, you will be responsible for all aspects of timing including working with the implementation and RTL teams on timing changes, helping with construction/modify timing flows, timing analysis, and timing closure. Responsibilities include but are not limited to: Working with the CAD team to develop the timing flow that will be used on the project including scripting to improve analysis flows and engineer efficiency.
NewLead, Global Brand Art Direction & Design NikeLead, Global Brand Art Direction & DesignBeaverton, OregonCreative Directors, Designers, Brand Marketing Directors, Brand Creative Leadership, Narrative Leads, Retail Design, Digital Design, Production and Operations teams, as well as external agencies. The Global Art and Design team, part of Nike Brand Creative, delivers world-class creative execution against brand design storytelling, with innovative thinking and an obsession around the craft.