Sr. Design Verification Engineer DustPhotonics LtdSr. Design Verification EngineerSan Jose, CA$130,000–$160,000 / yearOur product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. You'll develop and execute verification plans, build scalable reusable testbenches, write SV‑UVM sequences, debug issues, and collaborate closely with RTL designers and firmware/application engineering teams.
Front End Design Verification Engineer Tenstorrent IncFront End Design Verification EngineerSanta Clara, CAYou'll partner closely with CPU architects and RTL designers to develop verification strategies, create sophisticated tests, debug complex failures, and ensure the front end behaves correctly across a wide range of workloads and corner cases. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency.
Midcore Design Verification Engineer Tenstorrent IncMidcore Design Verification EngineerSanta Clara, CAYou'll work closely with CPU architects, RTL designers, and software engineers to develop verification strategies, build robust test environments, and uncover the corner cases that matter in a modern out-of-order processor. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency.
Director, SoC Design Engineering Intel CorpDirector, SoC Design EngineeringSanta Clara, CA$220,920–$311,890 / yearBusiness group: The Central Engineering Group (CEG) is Intel''s data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). As a trusted domain expert, you will directly influence Intel's technical direction, mentor the next generation of engineers, and drive innovation that strengthens Intel's leadership in the semiconductor industry.
Design Engineer II # 26-23166 US Tech Solutions, Inc.Design Engineer II # 26-23166Burlingame, CARemote$70–$150 / hourDesign and code the glue logic between CSI 2 output and ISP input: stream/virtual channel handling, data type unpacking, line/frame framing, pixel packing/width conversion, clock domain crossing, backpressure and FIFO/buffering, error and short packet handling. A contract digital design engineer to own integration of the camera ingest path — MIPI C/D PHY and CSI 2 receivers into the image signal processing (ISP) pipeline — including development of the glue logic required to bridge CSI 2 and ISP interfaces.
Staff/Sr. Staff Design Verification LightmatterStaff/Sr. Staff Design VerificationMountain View, CA$196,000–$222,500 / yearWork with analog design engineers to create behavioral models for analog designs and with digital design engineers to integrate models/testcase/checkers into upper levels. The company invented the world's first 3D-stacked photonics engine, Passage, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads.
Staff Vlsi Design Engineer SanDiskStaff Vlsi Design EngineerMilpitas, CAAn employee's pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs. ESSENTIAL DUTIES AND RESPONSIBILITIES: In this position, the individual will be responsible for the following: Designing, developing, modifying, and evaluating Analog/mix-signal Integrated Circuit (IC) of high performance NAND flash, including new, most advanced 3D NAND memories.
Staff VLSI design engineer SanDisk CorpStaff VLSI design engineerMilpitas, CAAn employee's pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs. ESSENTIAL DUTIES AND RESPONSIBILITIES: In this position, the individual will be responsible for the following: Designing, developing, modifying, and evaluating Analog/mix-signal Integrated Circuit (IC) of high performance NAND flash, including new, most advanced 3D NAND memories.
Design Verification Intern, MS - Summer 2027 Marvell Technology IncDesign Verification Intern, MS - Summer 2027Santa Clara, CACompleted courses focusing on computer architecture, logic, processor, memory system, Verilog, VLSI, VHDL, UVM, analog, integrated circuit design, digital logic design, SoC/ASIC design, verification principles, signals, system and signal processing. Across all groups, you'll collaborate with your direct team and cross-functional partners (across software, physical design, digital design, and more) to deliver robust, scalable solutions that enable Marvell's leadership in data infrastructure.
Designer Iii, Interior Architecture & Design Ware MalcombDesigner Iii, Interior Architecture & DesignSan Francisco, californiaEstablished in 1972, Ware Malcomb is a dynamic, forward-thinking commercial real estate design firm providing professional architecture, interior design, civil engineering, branding, building measurement, structural engineering and MEP engineering services to clients throughout the world. You will support project execution through Design Development (DD), Construction Documents (CD), and Contract Administration (CA), including submittals and furniture selection, while mentoring junior team members and coordinating project efforts under the general direction of a licensed interior designer.
Designer III, Interior Architecture & Design Ware MalcombDesigner III, Interior Architecture & DesignCAEstablished in 1972, Ware Malcomb is a dynamic, forward-thinking commercial real estate design firm providing professional architecture, interior design, civil engineering, branding, building measurement, structural engineering and MEP engineering services to clients throughout the world. You will support project execution through Design Development (DD), Construction Documents (CD), and Contract Administration (CA), including submittals and furniture selection, while mentoring junior team members and coordinating project efforts under the general direction of a licensed interior designer.
Senior Hardware Design Engineer Intellectt INCSenior Hardware Design EngineerDublin, CA$52–$56The role requires hands-on experience in high-speed PCB design, power tree architecture, processor and FPGA ecosystems, signal integrity, EMI/EMC, hardware validation, and board-level troubleshooting. Power tree architecture and complex DC-DC power management networks using buck and boost regulators, LDO regulators, and sequencing; power integrity, thermal management, and component derating.
Brand Design | Web WorkOSBrand Design | WebSan Francisco, CaliforniaRemoteWhile your primary focus will be owning web experiences, including the homepage, product pages, launch weeks, campaign microsites, and event experiences, you’ll also have opportunities to contribute to broader brand initiatives across digital and physical formats. You’ll work closely with the Creative Director and cross-functional partners to create scalable, beautiful, and performant web experiences that shape how developers and enterprise customers experience WorkOS online.
Senior Electrical Engineer - Circuit Design - TeraWave Blue Origin Enterprises LPSenior Electrical Engineer - Circuit Design - TeraWaveSan Francisco, CA$156,802–$219,522.45 / yearand/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing, vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs.
Senior Electrical Engineer - Power Design - TeraWave Blue Origin Enterprises LPSenior Electrical Engineer - Power Design - TeraWaveCA$156,802–$219,522.45 / yearand/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing, vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs.
Analog Mixed-Signal IC Design Engineer (Custom Digital Timing Characterization and Liberty Modeling) - TeraWave Blue Origin Enterprises LPAnalog Mixed-Signal IC Design Engineer (Custom Digital Timing Characterization and Liberty Modeling) - TeraWaveCA$230,398–$322,556.85 / yearand/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing, vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. lib models for custom digital and analog-digital interface circuits: Define and characterize timing arcs including input-to-output delay, clock-to-Q delay, setup and hold constraints, recovery and removal timing, minimum pulse-width constraints, enable/disable timing, tristate or conditional timing arcs, where applicable.
Software Engineer, Silicon Design Methodology OpenAI LLCSoftware Engineer, Silicon Design MethodologySan Francisco, CAFor unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non-public information. We're looking for a software engineer to help build the design methodology, software abstractions, and infrastructure that enable a small silicon team to develop complex chips rapidly and with high confidence.
Senior Digital Design Engineer - High-Speed I/O and Photonics NVIDIA CorpSenior Digital Design Engineer - High-Speed I/O and PhotonicsSanta Clara, CAWe recently delivered the industry's first 200G MRM-based silicon photonics chip, revolutionizing high-performance networking and enabling the era of Co-Packaged Optics (CPO) for NVIDIA. What You'll Be Doing: While engaged in frontend development, your responsibilities will include working on a wide range of high-speed, powerful DSPs, silicon photonics IPs, and chips.
Principal Modem PHY IP Design Verification Engineer - Terawave Blue Origin Enterprises LPPrincipal Modem PHY IP Design Verification Engineer - TerawaveCA$269,175–$376,843.95 / yearand/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing, vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs.
Designer II, Interior Architecture & Design Ware MalcombDesigner II, Interior Architecture & DesignPleasanton, CAEstablished in 1972, Ware Malcomb is a dynamic, forward-thinking commercial real estate design firm providing professional architecture, interior design, civil engineering, branding, building measurement, structural engineering and MEP engineering services to clients throughout the world. The firm is also ranked among the top 10 Architecture/Engineering firms in Engineering News-Record’s Top 500 Design Firms and the Top 30 Interior Design Firms in Interior Design magazine’s Top 100 Giants.