Experience with MATLAB, python, SystemVue or other system level modelingExperience modeling RF/Analog circuits using MATLAB/Verilog-A/python and writing block-level specifications based on this modeling Direct tape-out experience with one or more of the following blocks: RF front-end circuits, PA, LNA, mixer, oscillator, PLL, LO, VGA, filter, ADC/DAC, TIA or other baseband analog blocks in deep sub-micron CMOS technology. Translate chip or transceiver-level specifications into detailed block-level specifications Work with the design and algorithms team to develop models for the impact of analog impairments on transceiver performance Work with the design engineers to ensure block performance meets system requirements through bottom up modeling Overseeing the test and characterization of the design, and debugging issues that may arise from early development stages through productization.