We are seeking an Interconnect Communication System Design Engineer to lead the architecture, modeling, and specification of high-speed interconnect solutions. In this role, you will define system-level requirements, develop physical layer algorithms, and ensure robust performance, power, and area efficiency across various wireline standards (e.g., Ethernet, PCIe) under challenging channel conditions. This position is critical for enabling next generation high-speed connectivity in computing platforms.
The position is open for both Irvine, CA and San Jose, CA
Job Description
Develop advanced algorithms and architectures for high-speed electrical/optical wireline communication systems.
Model the algorithms in MATLAB, Python, or C++ for performance evaluation.
Optimize algorithms and architectures for performance, power, area, and latency.
Collaborate with worldwide design teams and provide support for bit-true, cycle-true modeling, design verification, and post-silicon validation.
Conduct advanced research and development in future wireline communication areas.
Numbers & Facts
Location
Irvine, CA
Skills
Algorithmsunmatched
C++ Programming Languageunmatched
Communication System Designunmatched
Communication Systemsunmatched
Computer Systemsunmatched
Design Verificationunmatched
Electricityunmatched
Ethernetunmatched
MATLABunmatched
Model Verificationunmatched
PCI Express (PCI-E)unmatched
Performance Analysisunmatched
Performance Reviewsunmatched
Python Programming/Scripting Languageunmatched
Research & Development (R&D)unmatched
Research Skillsunmatched
Systems Engineeringunmatched
Technical/Engineering Designunmatched
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