Hardware Design Engineer 4

Yantran LLC
  • San Jose, CA
  • Instant Apply
2 days ago

Job Description

About Us:
At *** (
*** | Connected World, Connected Experiences
), we live the philosophy of connected world and connected experiences. We thrive on change that is powered by the intelligent symphony of technology and humans designing meaningful and sustainable experiences. Consumer experiences are driving and disrupting industries like never before. Businesses must build seamless yet simple enterprises that collaborate, synergize, and drive the change. Change that connects us all and empowers us to deliver experiences that span across the digital, the physical, the convergent, and everything in between. That s when truly connected experiences manifest.
Extraordinary is when experiences come together a continuous convergence of digital technologies, touchpoints, and most importantly people. It s time to reimagine, reinvent, and revolutionize business models
operations as well as to transform enterprises into living, breathing, and connected businesses. We are the Digital Change makers who strive to change the way the world, communities, businesses, and humans interact digitally. We are harnessing the power of change, brought in by technologies, that makes it the most exciting time to be alive in human history. Our universe, as we build it, disrupt it, and redesign it, is powering the digital change.
*** represents the connected world, offering innovative and customer-centric information technology experiences, enabling Enterprises, Associates, and the Society to Rise. It has 150,000+ professionals working for 1000+ Global Customers (including Fortune 500 companies) in 90 Countries. We re part of the esteemed Mahindra group, headquartered in India. Under a new CEO, *** is committed to a transformative journey with 'Scale @ Speed' as our guiding principle.
Title - Hardware Design Engineer 4
Location: Santa Clara, CA / Austin, TX / Atalanta, GA / Longmont, CO (ONSITE)
KEY RESPONSIBILITIES:
DDR PHY Signal Integrity and Power Integrity Engineer
THE ROLE:
As a member of the CT Server DDR team, we are looking for an experienced signal integrity and power integrity engineer who can be responsible for
DDR PHY channel and power delivery network (PDN) architecture, system-level SI/PI, and post-silicon validation.
THE PERSON: The engineer needs to be hands-on in defining channel and PDN architectures, modeling signal and power delivery at the system level, and validating SI/PI on silicon.
The engineer needs to work with design, package, board, and firmware teams on the specification of SI/PI targets and their implementation, and to help debug issues across the full system stack.
KEY RESPONSIBILITIES:
Run system-level channel and PDN simulations (insertion/return loss, crosstalk, eye diagrams, impedance, IR drop, jitter transfer) and correlate with silicon results
Able to process post-silicon SI/PI validation data and drive the next steps
Debug SI/PI issues across silicon, package, and board, working with firmware and design teams
Support cross-functional teams with system, channel, PDN, and decoupling implementation details
PREFERRED EXPERIENCE:
Strong coding skills in Python and Matlab preferred
Signal integrity (SI) and power integrity (PI) knowledge, including S-parameter/Z-parameter analysis, channel modeling, and PDN modeling
Knowledge of Ansys or Cadence simulation tools (e.g., HFSS, SIwave, Sigrity, Clarity)
System-level experience with firmware and hardware debug expertise preferred
System modeling with silicon-to-simulation correlation
Firmware development for ATE and platforms
ACADEMIC CREDENTIALS:
Bachelor s or master s degree in computer engineering/electrical engineering
The payrate is ***/hr. to ***/hr. C2C
*** is an Equal Employment Opportunity employer. We promote and support a diverse workforce at all levels of the company. All qualified applicants will receive consideration for employment without regard to race, religion, color, sex, age, national origin, or disability. All applicants will be evaluated solely based on their ability, competence, and performance of the essential functions of their positions with or without reasonable accommodations. Reasonable accommodations also are available in the hiring process for applicants with disabilities.
Candidates can request a reasonable accommodation by contacting the company ADA Coordinator at
***
.

Numbers & Facts

LocationSan Jose, CA

Skills

  • Business Modelunmatched
  • Cadenceunmatched
  • Channel Strategiesunmatched
  • Computer Engineeringunmatched
  • Computer Firmwareunmatched
  • Computer Programmingunmatched
  • Cross-Functionalunmatched
  • Crosstalkunmatched
  • Customer Experienceunmatched
  • Debugging Skillsunmatched
  • Electrical Engineeringunmatched
  • Fortune 500 Customersunmatched
  • HFSS (High Frequency Structure Simulator)unmatched
  • Hardware Designunmatched
  • IR (Infrared)unmatched
  • Information Technology & Information Systemsunmatched
  • MATLABunmatched
  • PHYunmatched
  • Philosophyunmatched
  • Power Engineeringunmatched
  • Process Improvementunmatched
  • Python Programming/Scripting Languageunmatched
  • Signal Integrityunmatched
  • Simulationunmatched
  • System Integration (SI)unmatched
  • System Validationunmatched
  • Technical/Engineering Designunmatched

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