NewSystem Architect Micron Technology IncSystem ArchitectSan Jose, CA$146,000–$286,000 / yearFraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Sr Software Engineer - Platform Security Early Warning Services, LLCSr Software Engineer - Platform SecuritySan Francisco, CA$142,000–$183,000 / yearEarly Warning Services takes into consideration a variety of factors when determining a competitive salary offer, including, but not limited to, the job scope, market rates and geographic location of a position, candidate's education, experience, training, and specialized skills or certification(s) in relation to the job requirements and compared with internal equity (peers). Contributes to all aspects of technical architecture, design, prototyping and implementation in support of both Platform Engineering needs, as well as overall technology strategy, in coordination with senior Platform Engineering leadership.
Sr Platform Engineer Early Warning Services LLCSr Platform EngineerSan Francisco, CA$142,000–$183,000 / yearEarly Warning Services takes into consideration a variety of factors when determining a competitive salary offer, including, but not limited to, the job scope, market rates and geographic location of a position, candidate's education, experience, training, and specialized skills or certification(s) in relation to the job requirements and compared with internal equity (peers). Contributes to all aspects of technical architecture, design, prototyping and implementation in support of both Platform Engineering needs, as well as overall technology strategy, in coordination with senior Platform Engineering leadership.
Senior Power Engineer, Platforms Engineering Google LLCSenior Power Engineer, Platforms EngineeringSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing with key teams working on the development of our TPUs Vertex AI for Google Cloud Google Global Networking Data Center operations systems research and much more. Were the driving force behind Googles groundbreaking innovations empowering the development of our cutting-edge AI models delivering unparalleled computing power to global services and providing the essential platforms that enable developers to build the future.
Systems Quality Robotics Automation Engineer Apple IncSystems Quality Robotics Automation EngineerCupertino, CAlinear algebra, transformation matrices, kinematics) Experience debugging and troubleshooting complex mechatronic and software systems Experience in CADing/designing mechanical fixtures for robotic applications Experience with computer vision (OpenCV) and/or AI/ML applications Demonstrated ability to work in teams and collaborateMasters or PhD in Computer Science, Computer Engineering, Electrical Engineering, Mechanical Engineering, or a related field Experience designing and working with electronic circuits, and troubleshooting electronic signals for mechatronic solutions Strong understanding of QA methodologies and practices Meticulous attention to detail and skilled at balancing multiple projects in parallel without impacting the quality of deliverables Experience using and/or creating AI tools for development or robotic applications. We are the Product Systems Quality Watch & Home Hardware Automation team, who design, build and deploy robotic and mechatronic testing solutions to drive system quality for new Watch & Home products and experiences.
Embedded Software Engineer Array LabsEmbedded Software EngineerRedwood City, CaliforniaExperience with embedded software design and debugging of boards with multiple processors (ARM/RISC-V, DSPs, MCUs) and a large array of peripherals using a multitude of interfaces (SPI, UART, GPIO, I2C, Ethernet). ITAR Requirements: To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.
Performance Engineer Astera LabsPerformance EngineerSan Jose, CA$135,000–$170,000 / yearAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. Our Scorpio scale-up fabric switches are purpose-built to unlock the performance of next-generation AI workloads, and we're looking for a Senior Performance Engineer to demonstrate the real-world value of our silicon where it matters most: on real inference and training workloads running on GPUs at scale.
Performance Control Software Engineer - Platform Architecture Apple IncPerformance Control Software Engineer - Platform ArchitectureCupertino, CAYou will design and conduct performance experiments, create instrumentation and data visualizations, prototype innovative in-kernel performance control algorithms, collaborate with teams ranging from the core operating system through user-facing applications, and productize the software that controls the performance of every workload executed on hundreds of millions of Apple products around the world. As a member of our multifaceted group, you will have the unique and phenomenal opportunity to craft upcoming products that will delight and inspire millions of Apples customers every single day.
Hardware Technologies PhD Internships Apple IncHardware Technologies PhD InternshipsCupertino, CAPositions are open in but not limited to: Digital Design & Implementation Circuit Design Design Verification Functional Verification Formal Verification Low Power Design Power Management Systems Physical Design Post Silicon Validation Signal Integrity Power Integrity Packaging & Productization Performance & Functional Modeling Performance Architecture Computer Architecture Analog Design Mixed Signal Design RF Design Antenna Design Wireless Communications Battery, Camera and Display Engineering CAD Firmware Platform Architecture Sensing Power and Haptics Wireless Cellular GPU CPU SoC AMS You will receive technical mentorship and guidance that allows you to learn new things every day, gain practical skills, build real world experience, develop a greater understanding of our industry, and form valuable connections. Previous demonstrated internship or project work in computer architecture, VLSI, design, logic design, or circuit design Understanding of formal methods or verification Camera/touch/display engineering: optics, flat panel/HW, touch mechanical design; design and implement experiments validating new materials (optical, mechanical optimization for performance and reliability Strong teamwork skills with the ability to collaborate with multiple functional teams across a variety of disciplines Experience with C/C++, Verilog, VHDL, Python, Perl, Spice is beneficial Experience with Timing, Synthesis, Ansys, COMSOL.
Performance Engineer Astera Labs IncPerformance EngineerSan Jose, CA$135,000–$170,000 / yearAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. Our Scorpio scale-up fabric switches are purpose-built to unlock the performance of next-generation AI workloads, and we''re looking for a Senior Performance Engineer to demonstrate the real-world value of our silicon where it matters most: on real inference and training workloads running on GPUs at scale.
AdTech Platform Engineering Lead Microsoft CorpAdTech Platform Engineering LeadMountain View, CA$142,800–$274,800 / yearThe ideal candidate combines strong people leadership, deep technical expertise in modern web platforms (cloud hosted services, CI/CD, observability, edge/CDN, and performance), and a proven ability to operate business critical, privacy sensitive systems at scale. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
TPU Validation Manager Google LLCTPU Validation ManagerMountain View, CALead and manage the team responsible for the silicon validation of Tensor Processing Unit (TPU), Google"s custom machine learning accelerator, in mobile SoC products. Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.
Product Manager, Financial Engineering OpenAI LLCProduct Manager, Financial EngineeringSan Francisco, CAFor unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non-public information. The ideal candidate has prior experience in billing, finance, and accounting, ideally also building solutions for commercial users of varying sizes from small scale to enterprise.
Embedded Software Engineer II - C++ Realtime Platform Latitude AI LLCEmbedded Software Engineer II - C++ Realtime PlatformPalo Alto, CA$150,320–$225,480 / yearWhen you join the Latitude team, you'll work alongside leading experts across machine learning and robotics, cloud platforms, mapping, sensors and compute systems, test operations, systems and safety engineering - all dedicated to redefining the relationship between people and their vehicles for millions of customers. What you'll do: Support the development and maintenance of an on-vehicle UDS (ISO 14229) diagnostic stack running as a Linux userspace application on an embedded ARM-based compute platform, working alongside the subsystem owner.
Staff Cybersecurity Engineer - Zero Trust GMStaff Cybersecurity Engineer - Zero TrustMountain View, WashingtonAs a Staff Cybersecurity Engineer focused on Security Services, this role is responsible for assessing how users, devices, and services traverse complex network architectures and translating those findings into engineered zero trust patterns implemented through the appropriate identity-aware proxies and mesh VPN policies. The engineer will own the design and implementation of secure access capabilities that offload complex identity and context-based access decisions from applications to a centralized Secure Access Services platform, covering both web and non-web applications such as APIs, databases, administrative tools, and legacy TCP workloads.
Silicon Domain Architect Altera SemiconductorSilicon Domain ArchitectSan Jose, CaliforniaThe Silicon Domain Architect will contribute to future FPGA product generations by supporting subsystem architecture development, evaluating technology solutions, and helping drive implementation of secure, high-performance, and power-efficient silicon features. Develops and contributes to end-to-end architecture definitions for silicon domain subsystems, including Root of Trust (RoT) and FPGA configuration-related features within Altera FPGA products.
Principal Engineer, Design Verification - DDR Memory Subsystems Altera SemiconductorPrincipal Engineer, Design Verification - DDR Memory SubsystemsSan Jose, California$209,500–$299,200 / yearWith more than four decades of industry-leading FPGA expertise, our singular mission is to deliver programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets including AI, cloud, networking, edge computing, and embedded systems. As a Principal Engineer, you'll have the opportunity to shape verification strategy across multiple product generations, influence architectural decisions, mentor world-class engineering teams, and solve some of the industry's most challenging memory subsystem verification problems.
Senior Software Engineer RobinhoodSenior Software EngineerMenlo Park, CA$213,512–$230,000 / yearBachelor's degree (or foreign equivalent) in Computer Science, Computer Engineering, Software Engineering or a related field and 5 years of progressively responsible post- baccalaureate experience in the job offered or related occupation. Education and/or experience must include: GoLang, Python, or Scala; Kubernetes and Docker; EC2, S3, IAM, and VPC; Terraform and CloudFormation; Prometheus, Grafana, and Datadog; Buildkite, Jenkins, or GitHub Actions; PostgreSQL, Redis, and DynamoDB; and.
Staff Software Engineer – Compute Systems Software (Embedded OS) GMStaff Software Engineer – Compute Systems Software (Embedded OS)Mountain View, CaliforniaYou’ll work across the Linux kernel, board support packages (BSP), device drivers, and core frameworks on modern ARM-based SoCs, using C and classic UNIX/Linux tooling to deliver high-performance, highly reliable compute in production vehicles. You’ll report to the Software Engineering Manager, Compute Systems Software , and collaborate closely with partners across Android Automotive OS, multimedia, connectivity, and system frameworks to deliver platform capabilities that scale globally across GM’s vehicle portfolio.
NewSenior Physical Design Engineer Altera SemiconductorSenior Physical Design EngineerSan Jose, CaliforniaExecute all aspects of the physical design flow, including synthesis, floorplanning, place and route, clock tree synthesis (CTS), static timing analysis (STA), power and clock distribution, reliability analysis, and power/noise analysis. With more than four decades of industry‑leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge.