Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification Develop functional tests based on verification test plan Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage Debug, root-cause and resolve functional failures in the design, partnering with the Design team Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring design quality meets defined verification and coverage goals Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industryBachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience 6+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 6+ years of experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments Experience working across and building relationships with cross-functional design, model and emulation teams Experience with revision control systems like Mercurial(Hg), Git or SVN Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle Experience with Design verification of Data-center applications like Video, AI/ML and Networking designs Track record of 'first-pass success' in ASIC development cycles Experience with micro-architectural performance verification Experience verifying GPU/CPU designs Experience with verification of ARM/RISC-V based sub-systems or SoCs Experience in development of UVM based verification environments from scratch Experience with IP or integration verification of high-speed interfaces like PCIe, RoCE, DDR, HBM, Ethernet Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, EmulationMeta builds technologies that help people connect, find communities, and grow businesses. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today-beyond the constraints of screens, the limits of distance, and even the rules of physics.