Product Design Engineer HPProduct Design EngineerSan Francisco, California$107,400–$155,700 / yearYou’ll collaborate closely with industrial designers, hardware engineers, and interaction designers to transform ideas into functional prototypes and production-ready designs. From 3D CAD modeling and hands-on prototyping to engineering analysis and design validation, you’ll help solve complex mechanical challenges and drive designs from early concepts toward production.
Product Design Engineer - HPIQ HPProduct Design Engineer - HPIQSan Francisco, CaliforniaYou’ll collaborate closely with industrial designers, hardware engineers, and interaction designers to transform ideas into functional prototypes and production-ready designs. From 3D CAD modeling and hands-on prototyping to engineering analysis and design validation, you’ll help solve complex mechanical challenges and drive designs from early concepts toward production.
Brand Design Lead, Brand Studio Motive Technologies IncBrand Design Lead, Brand StudioSan Francisco, CA$171,000–$236,000 / yearMotive serves nearly 100,000 customers - from Fortune 500 enterprises to small businesses - across a wide range of industries, including transportation and logistics, construction, energy, field service, manufacturing, agriculture, food and beverage, retail, and the public sector. As both a creative leader and hands-on designer, you'll help develop and sell concepts for major campaigns and activations while providing clear, confident design leadership to cross-functional stakeholders.
Brown and Caldwell Internship (Design, Engineering, Marketing) Brown and Caldwell IncBrown and Caldwell Internship (Design, Engineering, Marketing)Walnut Creek, CA$18.40–$25.20 / hourInterns work alongside experienced professionals to assist with project coordination, research, analysis, documentation, communications, and operational support activities that contribute to successful team and client outcomes. In the event a recruiter or agency submits a resume or candidate without a previously signed agreement and approved engagement request with Brown and Caldwell, Brown and Caldwell reserves the right to pursue and hire those candidate(s) without any financial obligation to the recruiter or agency.
Engineering - FPGA Design/Verification Engineer The Structures Company, LLCEngineering - FPGA Design/Verification EngineerSunnyvale, CACross discipline collaboration with Systems Architects, RF/Analog & Digital Circuit designers and ASIC/FPGA engineers to create leading edge products for future business growth, contributing to complex systems employing high speed networking concepts. This engineer with have experience in developing, testing, and integrating digital signal processing (DSP), high speed digital design, high speed communication and system-on-chip (SOC) implemented on FPGA platforms.
Lead Analog Serdes Architect/Design Engineer Intel Corp.Lead Analog Serdes Architect/Design EngineerSanta Clara, CA$220,920–$311,890 / yearThe ideal candidate should have a minimum of MS in Electrical Engineering with 8+ years of experience in high-speed serial links and deep knowledge of analog CMOS/BiCMOS designs in deep sub-micron process technologies. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership.
Director, Silicon Design Engineering Intel Corp.Director, Silicon Design EngineeringSanta Clara, CA$220,920–$311,890 / yearBusiness group: The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). Generate and validate timing constraints and address timing violations at the chip and block levels for SoCs.- Conduct timing rollups and ensure functionality of designs with optimized performance and power characteristics.-
Senior Graphics Designer - Pottery Barn Williams-Sonoma, Inc.Senior Graphics Designer - Pottery BarnSan Francisco, CA$90,000–$105,000 / yearProduct Collaboration & Seasonal Holiday Projects: Support and help execute design concepts for Pottery Barn's collaboration and seasonal holiday projects, ensuring that each projects has a unique, inspiring visual identity that connects with the target audience. As a Senior Designer at Pottery Barn, you will play an essential role in conceptualizing and executing design strategies for a range of projects, including digital landing pages, emails, social media, and more.
Garphic Designer RedolentGarphic DesignerSan Bruno, CaliforniaWe are urgently looking for Graphic Designer for our Direct client requirement TITLE: Graphic Designer LOCATION: San Bruno, CA DURATION: 6+ months Rate: DOE Position Summary The Senior Graphic Designer will be a leader, problem solver and conceptual thinker. Minimum Qualifications Bachelors degree in Design, Advertising, Fine Arts, or related field and 6 years experience in interactive design or related field; OR 8 years experience in interactive design or related field.
Design Verification Lead Advanced Micro Devices, IncDesign Verification LeadSan Jose, CaliforniaAs a member of the front-end design and integration team, you will collaborate closely with architecture, IP design, physical design, firmware, and product engineering teams to deliver first-pass silicon success for next-generation PCIe and CXL-based IP solutions. KEY RESPONSIBILITIES: Collaborate with architects, hardware designers, and firmware teams to define and verify new PCIe, CXL, and high-speed connectivity features.
Sr. ASIC Design Verification Engineer (Silicon Engineering) SpaceXSr. ASIC Design Verification Engineer (Silicon Engineering)Palo Alto, CA$175,000–$280,000 / yearWe are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
Staff RFIC Design Engineer Western Digital CorpStaff RFIC Design EngineerSan Jose, CAResponsibilities include transistor level, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification, preparation of test plan for the test group, product characterization, reliability and yield assessment and modeling, simulation to bench and bench to test correlation, bench evaluation both at silicon level and at applications level, and documentation. We combine deep engineering expertise with global-scale manufacturing to deliver the storage systems that make AI possible, powering hyperscale data centers, cloud platforms, and enterprise infrastructure worldwide.
Staff Rfic Design Engineer Western Digital CorpStaff Rfic Design EngineerSan Jose, CAResponsibilities include transistor level, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification, preparation of test plan for the test group, product characterization, reliability and yield assessment and modeling, simulation to bench and bench to test correlation, bench evaluation both at silicon level and at applications level, and documentation. An employee's pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs.
Director, Soc Design Engineering Intel Corp.Director, Soc Design EngineeringSanta Clara, CA$220,920–$311,890 / yearBusiness group: The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). As a trusted domain expert, you will directly influence Intel's technical direction, mentor the next generation of engineers, and drive innovation that strengthens Intel's leadership in the semiconductor industry.
Design Verification Engineer (Silicon Engineering) SpaceXDesign Verification Engineer (Silicon Engineering)Palo Alto, CA$135,000–$155,000 / yearWe are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
Sr. Design Verification Engineer DustPhotonics LtdSr. Design Verification EngineerSan Jose, CA$130,000–$160,000 / yearOur product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. You'll develop and execute verification plans, build scalable reusable testbenches, write SV‑UVM sequences, debug issues, and collaborate closely with RTL designers and firmware/application engineering teams.
Midcore Design Verification Engineer Tenstorrent IncMidcore Design Verification EngineerSanta Clara, CAYou'll work closely with CPU architects, RTL designers, and software engineers to develop verification strategies, build robust test environments, and uncover the corner cases that matter in a modern out-of-order processor. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency.
Front End Design Verification Engineer TenstorrentFront End Design Verification EngineerSanta Clara, CAYou'll partner closely with CPU architects and RTL designers to develop verification strategies, create sophisticated tests, debug complex failures, and ensure the front end behaves correctly across a wide range of workloads and corner cases. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency.
Design Engineer II # 26-23166 US Tech Solutions, Inc.Design Engineer II # 26-23166Burlingame, CARemote$70–$150 / hourDesign and code the glue logic between CSI 2 output and ISP input: stream/virtual channel handling, data type unpacking, line/frame framing, pixel packing/width conversion, clock domain crossing, backpressure and FIFO/buffering, error and short packet handling. A contract digital design engineer to own integration of the camera ingest path — MIPI C/D PHY and CSI 2 receivers into the image signal processing (ISP) pipeline — including development of the glue logic required to bridge CSI 2 and ISP interfaces.
FPGA Design Engineer Emcore CorporationFPGA Design EngineerConcord, CA$130,000–$185,000 / yearFull timeJob Title/Code: FPGA Design Engineer; Job Code: RD400Department: Engineering Reports To: Engineering Manager Job Type: Full-Time, Exempt Location: Concord, CA (On-Site)Position Summary:EMCORE is seeking an FPGA Design Engineer to lead FPGA-based logic and firmware development for our high-performance inertial sensing systems. You will design, verify, and implement FPGA logic and the firmware that runs alongside it, working closely with hardware, systems, and manufacturing teams to bring designs from first prototype through volume production.