You will own RNM/SystemVerilog behavioral modeling and verification of analog/RF blocks (regulators, bandgaps, data converters, LNA/PA, mixers, PLLs) inside a large SoC, including self-checking models, assertions for analog/digital specs, and AMS environment setup with analog designers In this role, you will own the modeling and verification of advanced analog/RF blocks residing within a large SoC.Development of RNM RF/Analog models in SystemVerilog. Experience modeling mixed signal/RF blocks including biasing networks, power regulators, bandgaps, Opamps, OTAs, data converters, LNA, PA, mixers, couplers, splitters, combiners, etc… Experience modeling high frequency PLLs is desired.