Degree must be completed prior to joining Meta Proficiency in C++ and Python for developing simulation models, automation frameworks, and performance analysis tools Experience in ASIC performance modeling, microarchitectural analysis, or pre-silicon simulation for custom silicon or SoC designs Experience with the performance analysis of data center, AI accelerator, or high-performance computing workloads on custom silicon Experience developing cycle-accurate or transaction-level performance models using C++ and SystemC for complex digital systems, including processors, memory subsystems, or high-speed interconnects Experience defining microarchitectural specifications and driving cross-functional alignment across architecture, RTL, and physical design teams Experience with assembly programming languages, and with compiler technologies Experience developing Python-based automation pipelines for simulation orchestration, regression testing, and performance data analysis Experience with AI numerics, data types, math functions, and precision/accuracy analysis Experience building or scaling performance modeling infrastructure for hyperscale data center ASICs, including network, storage, or AI inference accelerator designs Experience writing and optimizing compute/collective kernels in CUDA or equivalent GPU programming frameworks Familiarity with post-silicon performance validation and model-to-hardware correlation methodologies Experience with hardware description languages (e.g., SystemVerilog, VHDL) and simulation environments used in ASIC development flows Experience with ML domain knowledge including GenAI inference and Attention mechanisms Experience with high-level synthesis, power-performance-area trade-off analysis, or PPA-driven microarchitectural optimizationMeta builds technologies that help people connect, find communities, and grow businesses. In this role, you will establish functional and performance modeling methodologies and long-term silicon roadmap strategy, as well as develop and analyze workloads, partnering with architecture, design, and software teams to ensure Meta's infrastructure silicon meets the demanding throughput, latency, and efficiency targets required at hyperscale.