You will execute the design, layout, bring-up, and qualification of the boards and SoMs that make our seeker run: FPA and image-sensor interface, GPU SoC / SoM carrier, high-speed digital and low-noise analog signal chains, shared-memory data plane between sensor and compute, power architecture from missile bus to detector bias rails, and the low-level firmware that brings it all up. Architect and implement the high-speed image-sensor interface (LVDS, MIPI CSI-2, CameraLink, SLVS-EC, SerDes) end-to-end from sensor pinout to SoM ingest, including timing, signal integrity, and zero-copy DMA into GPU-accessible memory.