NewBusiness Development - Automotive MCUs, Processors and Vehicle Electronic Architectu[...] NXP SemiconductorsBusiness Development - Automotive MCUs, Processors and Vehicle Electronic Architectu[...]San Jose, CAAct as primary interface to OEM and Tier‑1 technical and executive stakeholders (Architects, HW and SW engineers and leaders).Lead customer workshops on vehicle E/E architecture evolution, including zonal controllers, network topology, safety, and compute consolidation. Key ResponsibilitiesDefine and execute the business development strategy for Americas for automotive MCUs, processors, and vehicle compute architectures (zonal / centralized).Identify and drive design‑win opportunities with global automotive OEMs and Tier‑1 suppliers.
Consumer Loan Servicing Processor Jess BusheyConsumer Loan Servicing ProcessorSan Jose, California$64,000This position is responsible for processing servicing requests and loan maintenance related to consumer loans, including vehicles, lines of credit, personal loans, credit cards, and solar. Receives and processes incoming subordination requests by reviewing documents received; prepares the subordination agreement; packages subordination files for review and signature; scans and packages fully executed subordination agreements for mailing.
SoC uArchitect / Architect – Automotive, Safety Island, ARM Processor Subsystems and Edge AI Platforms Altera SemiconductorSoC uArchitect / Architect – Automotive, Safety Island, ARM Processor Subsystems and Edge AI PlatformsSan Jose, CaliforniaIn this role, you will contribute to architecture and microarchitecture definition for ARM processor subsystems, safety islands, interconnect fabrics (AXI/APB), memory systems, and FPGA-to-processor integration for edge platforms. With more than four decades of industry-leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, automotive, and edge.
Processor Advance ServicesProcessorMoss Landing, CASegregate product on conveyor belt or table according to grade, color, and size, and place product in containers or on designated conveyors Gather, weigh and tally roe baskets. Silver Bay Seafoods California processors can be assigned to various positions within the production department including, but not limited to, sorting, boxing, and weighing.
Seed Processor Advance ServicesSeed ProcessorHollister, CAIdentify and report discrepancies or errors in seed counts and weights to supervisor and appropriate warehouse departments . Stop in and see our experienced, bilingual, and friendly staff today at 8021 Kern Ave., Gilroy, CA 95020 .
Packet Processor Architect EriduPacket Processor ArchitectSaratoga, CaliforniaInvestigate and resolve complex issues related to packet processing, working closely with cross-functional teams including hardware engineers, firmware developers, and system architects. We are looking for a highly experienced Packet Processor Architect to lead the definition and implementation of Eridu's industry leading Networking ASIC.
Embedded Firmware Engineer - Image Signal Processor (ISP) Apple IncEmbedded Firmware Engineer - Image Signal Processor (ISP)Cupertino, CABS or MS in Computer Science, Electrical Engineering, or a related field 3+ years of experience developing multi-threaded software within embedded RTOS environments Strong proficiency in C and C++5+ years of embedded firmware development experience Experience with camera pipelines, image signal processors, or video processing systems Track record of bringing up firmware on new silicon or hardware platforms, Familiarity with pre-silicon development environments including emulators and FPGA prototypes Experience with firmware performance tuning, memory optimization, and power management Proficiency with AI-assisted development tools and workflows Understanding of low-level hardware interfaces and register-level programming Ability to debug complex systems using hardware and software tools Strong communication skills and ability to work effectively across teams. Our team fosters an environment of product innovation, rapid iteration, and collaboration across multiple functions while providing meaningful autonomy to deliver impactful work.
Retail Truck Processor (Morning Shift) Marshalls of CARetail Truck Processor (Morning Shift)Sand City, CaliforniaResponsible for delivering a highly satisfied customer experience proven by engaging and interacting with all customers, embodying customer experience principles and philosophy, and maintaining a clean and organized store environment. Accurately rings customer purchases/returns and counts change back to customer according to established operating procedures.
Loan Processor West Coast Community BancorpLoan ProcessorWatsonville, CA$32–$40 / hourWhile performing the duties of this job, the employee may be regularly required to stand, sit, talk, hear, reach, stoop, kneel, and use hands and fingers to operate typical office equipment such as a computer, telephone, mouse and keyboard. West Coast Community Bank is a top-rated community bank with a focus on serving the banking needs of businesses and individuals along the Central Coast, in Silicon Valley and throughout the Bay Area.
Senior Director, Architecture Research Lab Samsung SemiconductorSenior Director, Architecture Research LabSan Jose, CA$246,000–$430,000 / yearThe role is responsible for end‑to‑end co‑design of AI workloads, system‑level modeling, hardware platforms, and high‑performance processors that leverage Samsung's advanced memory technologies to eliminate capacity, bandwidth, and large‑scale communication bottlenecks. Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.
Sr. System Development Engineer, AL/ML/Storage server team Amazon.com IncSr. System Development Engineer, AL/ML/Storage server teamCupertino, CAYou will collaborate with a variety of roles (SDEs, SDETs, Mechanical/Electrical/Hardware Engineers, TPMs, Managers, Principals) and organizations through server conception, test validation, qualification, launch, and operations - driving high quality and reliability into current and future designs for AWS server solutions. You will work across multiple teams and organizations to build scalable, reliable systems that keep our storage and accelerated (AI/ML) compute fleet healthy - with a vision toward zero-touch operations where automation detects, diagnoses, and resolves issues without human intervention.
Design Verification and Emulation Manager Efficient ComputerDesign Verification and Emulation ManagerSan Jose, PennsylvaniaThis role combines deep technical expertise with strong people leadership and program execution skills, and is ideal for someone who thrives at the intersection of architecture, verification methodology, hardware-software integration, and team building. SoC Architecture: Solid understanding of modern SoC architectures — processors (ARM, RISC-V), cache coherency, interconnects (AMBA AXI/ACE/CHI), memory subsystems, and common peripherals.
Principal Engineer, ASIC Design Verification Ayar Labs IncPrincipal Engineer, ASIC Design VerificationSan Jose, CA$190,000–$240,000 / yearBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Strategic Planning: Collaborate with Architects and RTL Designers early in the cycle to define the verification plan, identify architectural bottlenecks, and ensure micro-architecture testability.
Senior Technical Staff Engineer - Validation (System Design) Microchip Technology IncSenior Technical Staff Engineer - Validation (System Design)San Jose, CA$91,000–$232,000 / yearOur product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). Hands-on systems level design and debug experience with following high-speed serial communications protocols (must: PHY, PCS and Data link layer of the OSI protocol stack; desirable: transaction and upper layers of the OSI protocol): Protocol Testing at UNH for various IEEE Clauses pertaining to.
Technical Staff Engineer - Applications Microchip Technology IncTechnical Staff Engineer - ApplicationsSan Jose, CA$91,000–$232,000 / yearOur product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). Advanced level domain expertise in one or more FPGA/SoC design/debug expertise - DDR memory interfaces and protocols, Transceiver and high speed serial interfaces, timing closure techniques, FPGA synthesis and simulation, Embedded Cortex or RISC-V processor/microcontrollers etc, Serdes and high-speed serial interfaces and protocols.
Design Verification and Emulation Manager EfficientAI CorpDesign Verification and Emulation ManagerSan Jose, CA$210,000–$250,000 / yearKey ResponsibilitiesDefine end-to-end verification strategy from block-level through full-chip simulation to emulation and prototypingOwn UVM-based methodology, including constrained-random, coverage-driven closure, assertions, and formal verification adoptionDrive emulation platform strategy - platform selection, capacity planning, compilation flows, and multi-project schedulingEnable system-level validation on emulation - processor boot, OS bring-up, firmware execution, and IO exercisingDeliver pre-silicon platforms for early software development in partnership with firmware and software teamsEstablish hybrid simulation-emulation methodologies using transactor-based interfaces to maximize both environmentsOwn functional coverage models and sign-off criteria, driving closure across simulation and emulation combinedLead debug and root cause analysis across simulation and emulation, driving cross-functional bug resolutionManage verification dashboards, bug tracking, and regression health to provide clear visibility to program leadershipBuild, mentor, and scale a high-performing team of verification and emulation engineersDrive verification schedules and risk mitigation aligned with chip program milestones and tapeout readinessRepresent verification and emulation in tapeout readiness reviews and program-level decision forumsCollaborate cross-functionally with Compiler Team, RTL design, architecture, DFT, physical design, and post-silicon teamsManage emulation lab infrastructure, including hardware resources, licensing, and vendor relationshipsEvaluate and adopt new EDA tools and methodologies, including AI/ML-assisted verification techniques. This role combines deep technical expertise with strong people leadership and program execution skills, and is ideal for someone who thrives at the intersection of architecture, verification methodology, hardware-software integration, and team building.
Solutions Architect Advanced Micro Devices, IncSolutions ArchitectSan Jose, CaliforniaParticipate in a technical role in all phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation, productization and support including but not limited to architecture, design, and documentation for IPs. Join our team to architect and develop cutting-edge hardware/software co-design solutions for FPGA-based acceleration across a wide range of applications—such as networking, storage, automotive, aerospace, and emerging AI/ML workloads.