Working in a III-V cleanroom environment with minimal supervision, the Process Engineer partners closely with Wafer Fab Supervisors, Technicians, Equipment Engineering, Device and Test Engineering, and Quality to maintain Process-of-Record (POR) discipline, drive data-based decisions, and support reliable, high-yield, high-volume manufacturing. The Process Engineer owns one or more fab process modules (photolithography, PECVD, dry etch, wet etch, and metallization), including the Mesa etch and surface preparation steps that support MOCVD epitaxial regrowth of InP current-blocking layers used to form the buried heterostructure.