Key Responsibilities: Define and drive end-to-end architecture for next-generation interconnect solutions utilizing 112G, 224G, and emerging 448G SerDes technologies, Co-Packaged Optics (CPO), Near-Packaged Optics (NPO), Linear Pluggable Optics (LPO), Co-Packaged Connectors (CPC), Near-Package Connectors (NPC), copper and optical flyover architectures, Active Electrical Cables (AEC), and advanced optical interconnects. Impact: Serve as a senior technical leader driving Qualcomm''s transition from conventional PCB-based interconnects to NPC/CPC flyover architectures, co-packaged optics, silicon photonics, and EIC/PIC-integrated systems, enabling scalable AI infrastructure beyond 224G and toward 448G-per-lane technologies.