UNKNOWN

FEED

From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Preferred qualifications: Research experience in specialized areas such as high-performance/low-power architectures, domain-specific accelerators (DSAs/TPUs), memory hierarchies, coherent interconnects (e.g., CXL, PCIe, UCIe, NoC), or advanced packaging/chiplets.

Google LLC

Silicon Engineer, PhD, University Graduate, 2027 Start

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Degree must be completed prior to joining Meta Proficiency in C++ and Python for developing simulation models, automation frameworks, and performance analysis tools Experience in ASIC performance modeling, microarchitectural analysis, or pre-silicon simulation for custom silicon or SoC designs Experience with the performance analysis of data center, AI accelerator, or high-performance computing workloads on custom silicon Experience developing cycle-accurate or transaction-level performance models using C++ and SystemC for complex digital systems, including processors, memory subsystems, or high-speed interconnects Experience defining microarchitectural specifications and driving cross-functional alignment across architecture, RTL, and physical design teams Experience with assembly programming languages, and with compiler technologies Experience developing Python-based automation pipelines for simulation orchestration, regression testing, and performance data analysis Experience with AI numerics, data types, math functions, and precision/accuracy analysis Experience building or scaling performance modeling infrastructure for hyperscale data center ASICs, including network, storage, or AI inference accelerator designs Experience writing and optimizing compute/collective kernels in CUDA or equivalent GPU programming frameworks Familiarity with post-silicon performance validation and model-to-hardware correlation methodologies Experience with hardware description languages (e.g., SystemVerilog, VHDL) and simulation environments used in ASIC development flows Experience with ML domain knowledge including GenAI inference and Attention mechanisms Experience with high-level synthesis, power-performance-area trade-off analysis, or PPA-driven microarchitectural optimizationMeta builds technologies that help people connect, find communities, and grow businesses. In this role, you will establish functional and performance modeling methodologies and long-term silicon roadmap strategy, as well as develop and analyze workloads, partnering with architecture, design, and software teams to ensure Meta's infrastructure silicon meets the demanding throughput, latency, and efficiency targets required at hyperscale.

Meta Platforms Inc

ASIC Engineer, Performance Architecture and Modeling (University Grad)

For questions, please contact Eunice Lin, Faculty Affairs Administrator, Department of Cardiothoracic Surgery, at elin94@stanford.edu. develop an active clinical practice, be an active teacher of medical students, residents, and.

YEAR

Stanford University

Assistant Professor, University Medical Line, Dept of Cardiothoracic Surgery

MINIMUM QUALIFICATIONS: Equivalent to a bachelor's degree from an accredited college or university in accounting, finance, business administration or closely related field AND seven years of progressively responsible accounting management experience, preferably in a higher education or non-profit setting, which includes at least three years of supervisory experience OR a combination of education and experience which provides the required knowledge and abilities. The position is required to participate in training at the direction of the Clery Director and must also promptly report allegations of reportable crimes according to the Jeanne Clery Disclosure of Campus Security Policy and Campus Crime Statistics Act, its accompanying regulations; the California State Education Code, Chapter 15.5, of the Donahoe Higher Education Act, Section 67380; and the California State University system-wide policy, Code EO 1107.

California State University

University Controller

The successful candidate will be organized, service-oriented, proactive, and comfortable working with students, candidates, hiring managers, recruiters, HR business partners, university representatives, and external partners. This role will help build relationships with universities, technical colleges, student organizations, and professional associations to attract interns, co-op students, apprentices, new graduates, and other early-career talent.

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