Senior Principal Engineer - Hardware Chip Lead, Connectivity BU MarvellSenior Principal Engineer - Hardware Chip Lead, Connectivity BUSanta Clara, CAOur products - including multi-terabit retimers, coherent DSP devices, and high-speed optical transceivers - are critical enablers for efficient, high-bandwidth data transmission across fiber optical networks and electrical interconnects at 100G+ per lane. We are a global, multi-site engineering organization spanning Santa Clara, Ottawa, Pavia, Irvine, Vietnam, and Argentina - and we are looking for a senior experienced technical leader to serve as Hardware Chip Lead on our next-generation ODSP programs.
Principal Engineer, Verification MarvellPrincipal Engineer, VerificationSanta Clara, CAHighlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers' specifications whether they're a major telecom organization or automotive company, etc.
Associate Principal / Senior Electrical Engineer (MEP) ESPO CorporationAssociate Principal / Senior Electrical Engineer (MEP)San Francisco, CA$142,000–$178,000 / yearAs an Associate Principal / Senior Electrical Engineer, you will be taking ownership as a discipline leader on multiple projects. Managing complex MEP projects across numerous industries: Commercial, Medical, Biotech, Education, Transportation, and more.
Principal Silicon Validation Engineer Astera LabsPrincipal Silicon Validation EngineerSan Jose, CA$205,000–$260,000 / yearAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Principal Signal and Power Integrity Engineer Astera LabsPrincipal Signal and Power Integrity EngineerSan Jose, CA$203,000–$230,000 / yearAstera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Principal Signal And Power Integrity Engineer Astera LabsPrincipal Signal And Power Integrity EngineerSan Jose, CA$203,000–$230,000 / yearAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Principal Serdes Bring-Up Validation Engineer Astera LabsPrincipal Serdes Bring-Up Validation EngineerSan Jose, CA$185,000–$240,000 / yearAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. Deep understanding of NRZ and PAM4 architectures and high-speed building blocks (PLLs, CTLE, DFE, FFE, transmitter equalization), with the ability to investigate jitter sources, CDR/PLL behavior, crosstalk, and power integrity issues.
Optical Test Engineer, Principal Astera LabsOptical Test Engineer, PrincipalSan Jose, CA$185,000–$240,000 / yearAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. This senior role drives optical and electro-optical testing for next-generation high-bandwidth CPO modules and optical engines integrated with ASICs for AI, hyperscale data centers, and high-performance computing.
Hardware & Silicon Validation Senior Principal Engineer MarvellHardware & Silicon Validation Senior Principal EngineerSanta Clara, CAThe group validates complex, high performance silicon and platforms across a wide range of critical technologies and interfaces, including Memory Subsystems (DDR, HBM, memory controllers), High Speed Interconnects (PCIe, Ethernet, CPRI, PAM4/NRZ), D2D interconnects, Storage, and IO (Flash and NVME, SSD controllers, USB) and System and Platform testing. The Custom Cloud Solutions (CCS) Hardware Validation Group is responsible for ensuring the quality, reliability, and performance of next generation data center ASIC and SoC products spanning a diverse portfolio that includes cloud infrastructure, AI accelerators, network processors, NICs, custom ASICs, SSD controllers, CXL devices, and domain specific accelerators.
Principal Analog/Mixed Signal CAD Engineer MarvellPrincipal Analog/Mixed Signal CAD EngineerSanta Clara, CAHighlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. You will join Marvell's Central Engineering CAD team, a group responsible for building and supporting the advanced design infrastructure used by hundreds of engineers developing some of the industry's most sophisticated silicon.
Senior Principal Software Applications Engineer MarvellSenior Principal Software Applications EngineerSanta Clara, CAHighlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. This role is designed for a highly experienced engineer who combines deep technical expertise with strong customer engagement skills and the ability to influence both internal development teams and external partners.
Security AI Engineer, Principal Member Of Technical Staff QuantumScape Corp.Security AI Engineer, Principal Member Of Technical StaffSan Jose, CA$155,000–$236,000 / yearWe are actively building an internal agentic AI platform for security and IT operations - multi-agent workflows that triage incidents, perform asset reconnaissance, run access reviews, and generate audit evidence, with humans in the loop wherever judgment matters. Security Engineering Breadth: Vulnerability management (Tenable or equivalent), endpoint control and application allowlisting (ThreatLocker or equivalent), identity and privileged access (SSO, FIDO2, PAM), and software supply chain security (SBOM, image scanning, signing).
NewPrincipal Analytics & AI Engineer LiveRampPrincipal Analytics & AI EngineerSan Francisco, CaliforniaHundreds of global innovators, from iconic consumer brands and tech giants to banks, retailers, and healthcare leaders turn to LiveRamp to build enduring brand and business value by deepening customer engagement and loyalty, activating new partnerships, and maximizing the value of their first-party data while staying on the forefront of rapidly evolving compliance and privacy requirements. Design, build, and certify reusable AI-powered, self-service metrics, dashboards, agents, and analytical products based on business needs for stakeholders in Product and Engineering teams to independently answer complex questions and provide actionable insights.
Principal ML Engineer TypefacePrincipal ML EngineerPalo Alto, CA$230,000–$260,000 / yearAs a Principal Machine Learning Engineer, you will operate at the company level-defining technical strategy, driving architectural decisions, and shaping the future of generative AI at Typeface. You will lead the design of large-scale ML systems and shared platforms that power all generative capabilities across agents, text, image, audio, and video.
Principal Research Engineer, Post-Training Character AIPrincipal Research Engineer, Post-TrainingRedwood City, CATechnical Leadership & Mentorship: Define and drive the technical roadmap for mid- and post-training systems, balancing research innovation with production reliability and scalability. You will partner closely with researchers, engineers, product teams, and infrastructure teams to identify the highest-leverage opportunities for improving model performance and user experience.
Principal Software Engineer, Kernels D-MatrixPrincipal Software Engineer, KernelsSanta Clara, CAWhat you will bring: Minimum: MS in computer engineering, math, physics, or a related degree with 12+ years of industry experience or a PhD in computer engineering, math, physics, or a related degree with 7+ years of industry experience. You will work with a team of compiler experts to build out the compiler infrastructure, working closely with other software (ML, systems) and hardware (mixed signal, DSP, CPU) experts in the company.
Principal Electrical Design Engineer Array LabsPrincipal Electrical Design EngineerRedwood City, California$220,000–$270,000 / yearHands-on experience designing high-performance platforms including compute (SoCs, FPGAs, MCUs), storage (DDR, SSDs), high-speed interfaces (PCIe, SPI, JESD204B), RF components (PAs, LNAs, switches). ITAR Requirements: To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.
Principal Software Engineer - CoreAI MicrosoftPrincipal Software Engineer - CoreAIMountain View, CA$142,800–$274,800 / yearMasters Degree in Computer Science or related technical field AND 8+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python OR Bachelors Degree in Computer Science or related technical field AND 12+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python OR equivalent experience. You will work in a group focusing on advancing Azure Content Understanding, a multimodal AI capability that enables organizations to transform unstructured data—such as text, documents, audio, images, and video—into structured, actionable insights.
Principal Engineer, Signal-Integrity And Power-Integrity SK hynixPrincipal Engineer, Signal-Integrity And Power-IntegritySan Jose, CA$185,000–$220,000 / yearMethodology Development: Invent and propagate best‑practice SIPI methodologies, including electromagnetic extraction, multi‑port S‑parameter modeling, and power‑network analysis for complex packaging environments. Architecture & Design: Lead the creation of high‑performance SiP architectures (HBM, interposer, 3 D stacks) and validate power‑delivery and signal‑integrity across the full stack-from silicon to substrate.
Principal Engineer Software, AppSec (Chronosphere) Palo Alto NetworksPrincipal Engineer Software, AppSec (Chronosphere)San Francisco, CaliforniaRemoteDesign, implement, and work with other engineering teams to operate security tools and programs across the organization, including access control & workflows, vulnerability management, and detection/response systems. For candidates who receive an offer at the posted level, the starting base salary (for non-sales roles) or base salary + commission target (for sales/com-missioned roles) is expected to be the annual range listed below.