Define and drive the architecture of key SoC subsystems, including processors, memory subsystems, interconnects, AI engines, GPUs, multimedia blocks, and I/O interfaces, with a focus on performance, power, area, and cost tradeoffs. Define and evaluate system-level solutions involving analog and mixed-signal IPs, including high-speed SerDes, DDR PHYs, PCIe/CXL PHYs, clocking subsystems, power management circuits, and other I/O technologies.