RTL Engineer, Networking ASIC VortexlinkRTL Engineer, Networking ASICSaratoga, CAFull timeIf you're a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI Networking. As part of the Design Group, you will be responsible for defining, specifying, architecting, executing, and productizing cutting-edge Networking chips.
NewProfessional Structural Engineer P.E. NucorProfessional Structural Engineer P.E.Lathrop, CA$103,000–$137,000 / yearWith multiple locations throughout the United States, NBG is proud to design world-class building solutions tailored to meet the needs of any market including commercial, industrial, agricultural, and institutional. Nucor Buildings Group is searching for individuals who can contribute to our sales growth and profitability by creating safe, accurate, and cost-effective metal building systems.
NewR&D Engineer Gables Search GroupR&D EngineerLos Angeles, CA$100,000–$130,000Bachelor of Science degree in Electrical Engineering, Computer Science, or relevant field plus 4 years of demonstrated experience in FPGA design and testing/verification OR 2 years of FPGA experience in design and testing/verification with an MS or advanced degree. The successful individual in this role will participate in the design, simulation, prototyping, and testing of wireless communication and sensing projects and products.
Principal ASIC Design Engineer Starshield Space Exploration Technologies CorpPrincipal ASIC Design Engineer StarshieldHawthorne, CA$200,000–$285,000 / yearYou will work in a highly collaborative and fast-paced environment, where we are exploring unsolved problems and applying the SpaceX mindset of iterating rapidly to go from design and demo to operational capability at lightning pace. ITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
Sr. ASIC Design Engineer Starshield Space Exploration Technologies CorpSr. ASIC Design Engineer StarshieldHawthorne, CA$160,000–$225,000 / yearYou will work in a highly collaborative and fast-paced environment, where we are exploring unsolved problems and applying the SpaceX mindset of iterating rapidly to go from design and demo to operational capability at lightning pace. ITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
ASIC Design Engineer - Staff Celero CommunicationsASIC Design Engineer - StaffIrvine, CaliforniaCelero is seeking skilled and motivated ASIC Design Engineers to join our team and contribute to the development of optical transceivers for next-generation optical modems. Strong knowledge of Digital Signal Processing (DSP), Digital Communication, and Forward Error Correction (FEC) techniques.
ASIC Design Engineer lll Hewlett Packard EnterpriseASIC Design Engineer lllSunnyvale, CaliforniaPlease note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. The successful candidate will be responsible for the microarchitecture, RTL implementation, integration, and bring-up of high-performance networking IPs and subsystems used in next-generation switch, router, SmartNIC, DPU, and AI networking products.
ASIC Design Engineer Hewlett Packard Enterprise CompanyASIC Design EngineerSunnyvale, CAFull timeAccountability, Accountability, Action Planning, Active Learning, Active Listening, Agile Methodology, Agile Scrum Development, Analytical Thinking, Bias, Coaching, Creativity, Critical Thinking, Cross-Functional Teamwork, Data Analysis Management, Data Collection Management (Inactive), Data Controls, Design, Design Thinking, Empathy, Follow-Through, Group Problem Solving, Growth Mindset, Intellectual Curiosity (Inactive), Long Term Planning, Managing Ambiguity {+ 5 more}. Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process.
ASIC Design Engineer lll Hewlett Packard Enterprise CoASIC Design Engineer lllSunnyvale, CA$120,000–$243,000 / yearPlease note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world.
New Graduate Engineer, ASIC Design Starshield Space Exploration Technologies CorpNew Graduate Engineer, ASIC Design StarshieldHawthorne, CA$125,000–$150,000 / yearYou will work in a highly collaborative and fast-paced environment, where we are exploring unsolved problems and applying the SpaceX mindset of iterating rapidly to go from design and demo to operational capability at lightning pace. ITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
ASIC Design Engineer Hewlett Packard Enterprise CoASIC Design EngineerSunnyvale, CA$120,000–$243,000 / yearAdditional Skills: Accountability, Accountability, Action Planning, Active Learning, Active Listening, Agile Methodology, Agile Scrum Development, Analytical Thinking, Bias, Coaching, Creativity, Critical Thinking, Cross-Functional Teamwork, Data Analysis Management, Data Collection Management (Inactive), Data Controls, Design, Design Thinking, Empathy, Follow-Through, Group Problem Solving, Growth Mindset, Intellectual Curiosity (Inactive), Long Term Planning, Managing Ambiguity {+ 5 more}. Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process.
Principal ASIC Design Engineer Hewlett Packard Enterprise CoPrincipal ASIC Design EngineerSunnyvale, CA$174,000–$352,500 / yearPlease note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. Determines architecture and logic design, design verification through software developed for component and system simulation and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits.
ASIC Design Engineer Hewlett Packard EnterpriseASIC Design EngineerSunnyvale, CaliforniaAccountability, Accountability, Action Planning, Active Learning, Active Listening, Agile Methodology, Agile Scrum Development, Analytical Thinking, Bias, Coaching, Creativity, Critical Thinking, Cross-Functional Teamwork, Data Analysis Management, Data Collection Management (Inactive), Data Controls, Design, Design Thinking, Empathy, Follow-Through, Group Problem Solving, Growth Mindset, Intellectual Curiosity (Inactive), Long Term Planning, Managing Ambiguity {+ 5 more}What We Can Offer You: Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process.
Principal ASIC Design Engineer Hewlett Packard EnterprisePrincipal ASIC Design EngineerSunnyvale, CaliforniaPlease note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. Determines architecture and logic design, design verification through software developed for component and system simulation and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits.
Sr. ASIC Design Engineer Hewlett Packard Enterprise CoSr. ASIC Design EngineerRoseville, CA$153,500–$310,500 / yearPlease note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world.
Sr. ASIC Design Engineer Hewlett Packard EnterpriseSr. ASIC Design EngineerRoseville, CaliforniaPlease note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world.
Sr. Engineer, ASIC Design Ayar Labs IncSr. Engineer, ASIC DesignSan Jose, CA$160,000–$192,000 / yearBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Create clear documentation of their designs to enable backend ASIC engineers to perform physical implementation (clocks and timing constraints, floorplan guidance, testability) and collaborate to ensure timing signoff.
Sr. ASIC Design Engineer MicronSr. ASIC Design EngineerSan Jose, CaliforniaAs a Senior ASIC Design Engineer and domain expert, you will perform logic design across the full ASIC lifecycle from specifications and microarchitecture to design, integration, synthesis, timing, linting, and CDC. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.
ASIC/SoC Design Engineer, RTL design for SoC IPs Advanced Micro Devices IncASIC/SoC Design Engineer, RTL design for SoC IPsSan Jose, CAKnowledge of ARM architecture and AMBA protocol specifications Familiarity with PCIe or CXL transaction layer protocols Experience with low-power design techniques (clock gating, power gating, voltage scaling) Proficiency in scripting languages: Python, Perl, Tcl, or Shell scripting Exposure to formal verification tools for equivalence checking and property verification Familiarity with AI-assisted design tools and modern EDA technologies Experience mentoring junior engineers and leading design teams Strong technical writing skills for design specifications and documentation Excellent communication and collaboration skills in cross-functional environments. RTL Design & Microarchitecture: • Author detailed micro-architecture specifications and own complete Verilog RTL implementation of major IP blocks, ensuring compliance with PPA (Performance, Power, Area) targets and timing requirements.
Sr. ASIC Design Verification Engineer Starshield Space Exploration Technologies CorpSr. ASIC Design Verification Engineer StarshieldPalo Alto, CA$170,000–$235,000 / yearYou will work in a highly collaborative and fast-paced environment, where we are exploring unsolved problems and applying the SpaceX mindset of iterating rapidly to go from design and demo to operational capability at lightning pace. ITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
Principal ASIC Design Verification Engineer Starshield Space Exploration Technologies CorpPrincipal ASIC Design Verification Engineer StarshieldPalo Alto, CA$210,000–$295,000 / yearYou will work in a highly collaborative and fast-paced environment, where we are exploring unsolved problems and applying the SpaceX mindset of iterating rapidly to go from design and demo to operational capability at lightning pace. ITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
Senior ASIC Design Engineer Zp Group LlcSenior ASIC Design EngineerSaratoga, CA$250,000–$290,000 / yearKeywords: ASIC, ASIC Architect, Networking ASIC, AI Networking, Design, Microarchitecture, Performance Modeling, PCIe, SerDes, Ethernet, TCP/IP, RoCE, High-Speed Datapath, Silicon Validation, System-on-Chip, SoC Architecture, Hardware Design, IP Integration, Physical Design, Firmware Interface, Chip Architect, DPU, CPU, SOC. Qualifications for Senior ASIC Design Engineer: 10+ years of experience as an Chip Architect, preferably in networking or high-performance computing (Routers, Switches, GPU, CPU, Data Center, etc).
Cellular ASIC Design Engineer - Protocols Apple IncCellular ASIC Design Engineer - ProtocolsCalifornia, CAYou will own the full lifecycle from early architectural exploration and HW/SW partitioning, through RTL implementation, to silicon bring-up and lab validation. We're looking for a Cellular ASIC Design Engineer, where you will architect and implement protocol processing hardware for next-generation wireless SoCs.
Sr. Staff Engineer, ASIC Design Ayar Labs IncSr. Staff Engineer, ASIC DesignSan Jose, CA$180,000–$223,000 / yearBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Create clear documentation of their designs to enable backend ASIC engineers to perform physical implementation (clocks and timing constraints, floorplan guidance, testability) and collaborate to ensure timing signoff.
Lead ASIC Design Verification Engineer Starshield Satellite Engineering Space Exploration Technologies CorpLead ASIC Design Verification Engineer Starshield Satellite EngineeringHawthorne, CA$160,000–$225,000 / yearThe Lead ASIC Design Verification Engineer will lead a team that supports custom ASICs and FPGAs design for cutting edge satellites systems that deliver unprecedented quantities of data at unheard of speeds to the service-members who defend our Nation and Allies. ITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
ASIC Design Engineer, ML Processor & Digital IP Advanced Micro Devices IncASIC Design Engineer, ML Processor & Digital IPSan Jose, CAWe push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary.
SR ASIC Design Engineer - Ethernet Switch & High-Speed I/O Advanced Micro Devices IncSR ASIC Design Engineer - Ethernet Switch & High-Speed I/OSanta Clara, CAAs a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives.
SR ASIC Design Engineer - NoC & AXI Interconnect Advanced Micro Devices IncSR ASIC Design Engineer - NoC & AXI InterconnectSanta Clara, CAAs a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives.
Principal ASIC Design Engineer - PCIe / High-Speed I/O Advanced Micro Devices IncPrincipal ASIC Design Engineer - PCIe / High-Speed I/OSanta Clara, CAAs a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives.
Sr. ASIC Design Verification Engineer Silicon Engineering Space Exploration Technologies CorpSr. ASIC Design Verification Engineer Silicon EngineeringIrvine, CA$165,000–$230,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Staff Engineer, IP Design (ASIC) SK hynix memory solutions AmericaStaff Engineer, IP Design (ASIC)San Jose, CaliforniaAs a Staff Engineer, you will own critical High speed interface IP, drive methodology improvements (such as AI-assisted design flows), and mentor engineers to ensure first-pass silicon success. This team spans the full design cycle—from micro-architecture and RTL design to timing closure and tapeout readiness—enabling next-generation enterprise and AI data center storage solutions.
Sr. SOC/ASIC Physical Design Engineer Silicon Engineering Space Exploration Technologies CorpSr. SOC/ASIC Physical Design Engineer Silicon EngineeringSunnyvale, CA$170,000–$230,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Senior ASIC Design Engineer - Hardware NVIDIASenior ASIC Design Engineer - HardwareUs, CaliforniaThis position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. Understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
Senior ASIC Design Engineer NVIDIA CorpSenior ASIC Design EngineerCA$168,000–$264,500 / yearThis position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. Collaborate and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks.
Staff Engineer, ASIC Design Verification Samsung SemiconductorStaff Engineer, ASIC Design VerificationSan Jose, CA$163,000–$253,000 / yearCome join the team that is creating new computing system architectures needed to support emerging machine learning applications, data analytics and edge computing. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support.
ASIC Design Verification Engineer Waymo LLCASIC Design Verification EngineerMountain View, CA$175,000–$215,000 / yearSince its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver-The World''s Most Experienced Driver-to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states.
Sr. Staff ASIC Design Verification Engineer RivianSr. Staff ASIC Design Verification EngineerPalo Alto, California$237,000–$296,000 / year
ASIC Design Engineer (All Levels) 31 MSIASIC Design Engineer (All Levels)CaliforniaExperience in micro-architecture of complex custom/ASIC products, focusing in one or more of the following areas: NPU, embedded processors, DSP, graphics, and general-purpose microprocessors. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.
ASIC Design Engineer Apple IncASIC Design EngineerSanta Clara, CAKnowledge of high-performance memory subsystem, including dram controller, PHY architecture and design, DFI interface and dram interface calibration/training mechanisms and algorithms is a plus. As a member of our complex group, you will get the outstanding and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple's customers every single day.
ASIC Design Engineer - Pixel IP DMA Apple IncASIC Design Engineer - Pixel IP DMACupertino, CAAs a Pixel IP DMA Design Engineer in the Pixel IP team, you will work closely with architecture, design, and verification teams to build high performance and low power DMA engines that coordinate moving large amounts of data between the memory system and the Pixel IP Engine. Previous experience designing dedication DMA engines (especially related to machine learning applications), data storage, memory controllers, networking, image processing, and/or interconnects.
Senior ASIC Design Engineer, Google Cloud Google LLCSenior ASIC Design Engineer, Google CloudSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. You"ll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
ASIC Design Engineer - Cache Controller Apple IncASIC Design Engineer - Cache ControllerSanta Clara, CAAs we increase levels of parallelism, bandwidth and capacity, we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency, and high-bandwidth. Our high-bandwidth multi-client memory subsystems are blazing new territory with every generation.
ASIC Design Engineer (eInfochips) Arrow Electronics IncASIC Design Engineer (eInfochips)Mountain View, CAAlong with Arrow's $38B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals.
Senior ASIC Design Engineer - Terawave Blue Origin Enterprises LPSenior ASIC Design Engineer - TerawaveCA$197,529–$276,539.55 / yearand/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing (CDL drivers only), vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs.
Senior ASIC Design Engineer - Terawave Blue OriginSenior ASIC Design Engineer - TerawaveSan Diego, Californiaand/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing (CDL drivers only), vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs.
Staff/Principal Engineer. ASIC Design Verification (DDR expert) MicronStaff/Principal Engineer. ASIC Design Verification (DDR expert)San Jose, CaliforniaMicron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.
ASIC Design Engineer NVIDIA CorpASIC Design EngineerSanta Clara, CAWhat you'll be doing: Drafting microarchitecture documents and implementing high-performance, and area and power-efficient RTL to meet strictly defined development targets and specifications. Collaborating closely with architects, other designers, and pre and post silicon verification teams to deliver world-class RTL builds.
ASIC Design Engineer (Onsite) Cisco Systems IncASIC Design Engineer (Onsite)San Jose, CA$165,000–$241,400 / yearCisco Silicon One is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. ASIC design experience, delivering silicon from microarchitecture, specification, and RTL coding through tape-out with multiple ASIC tape-outs at advanced technology nodes.
ASIC Design Engineer - New College Grad 2026 NVIDIA CorpASIC Design Engineer - New College Grad 2026Santa Clara, CAIn this position, you will have the opportunity to be responsible for the micro-architecture and design including RTL design, synthesis and timing analysis using innovative CAD tools and using the latest process technologies. What you'll be doing: As a member of our Memory Subsystem Design team, you will collaborate with architects/design verification/formal verification/physical design team to deliver a world-class solution.
Principal ASIC Design Engineer Blue Origin Enterprises LPPrincipal ASIC Design EngineerCA$230,773–$323,081.85 / yearand/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing (CDL drivers only), vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs.