Circuit Design Engineer III Lockheed Martin CorpCircuit Design Engineer IIISunnyvale, CA$97,100–$171,235 / yearPay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $97,100 - $171,235. As a leading technology innovation company, Lockheed Martin's vast team works with partners around the world to bring proven performance to our customers' toughest challenges.
Staff Mechanical Design Engineer Momentus SpaceStaff Mechanical Design EngineerSan Jose, California$190,000–$215,000 / yearWe are level-headed, business-minded strategic thinkers intent on providing immediate value to our customers today while simultaneously preparing for the vast possibilities of the future. With an experienced team of aerospace, propulsion, and robotics engineers, Momentus has developed a cost-effective and energy-efficient in-space transport system.
Optical Design Engineer Gooch and HousegoOptical Design EngineerFremont, CA$140,000–$170,000 / yearAt our Fremont, CA Facility, we are looking for a motivated Individual to work in a team of Design Engineers interacting closely with Production, Sales and Process Engineering to help create, test and refine Acousto- and Electro-Optic Products through release-to-Manufacturing. Because of the unique Products G&H sells, the Job will initially focus on all technical aspects of Prototype build and characterization, and evolve over time into Product Design dependent on the Candidates experience and aptitude.
NewASIC Design Engineer, STA CiscoASIC Design Engineer, STASan Jose, California$155,000–$222,600 / yearThe applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $155,000.00 - $256,000.00 Non-Metro New York state & Washington state: $138,100.00 - $227,900.00 * For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Cisco’s silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon organization and a large campus (with onsite gym, healthcare, and café, social interest groups, and philanthropy), with the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide.
ASIC/RTL Design Engineer TPI Global (formerly Tech Providers, Inc.)ASIC/RTL Design EngineerSan Jose, CAOur RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and silicon bring-up teams. EXPERIENCE AND EDUCATION: SoC Architecture;knowledge and hand-on experience from industry ASIC design flow including RTL coding, debugging/verification, and supporting synthesis and timing closure.
NewASIC/RTL Design Engineer 5 LanceSoft IncASIC/RTL Design Engineer 5SAN JOSE, CA$82.35–$86.92 / hourOur RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and silicon bring-up teams. EXPERIENCE AND EDUCATION: SoC Architecture; knowledge and hand-on experience from industry ASIC design flow including RTL coding, debugging/verification, and supporting synthesis and timing closure.
NewASIC/RTL Design Engineer 5 TPI Global (formerly Tech Providers, Inc.)ASIC/RTL Design Engineer 5SAN JOSE, CAOur RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and silicon bring-up teams. SoC Architecture;knowledge and hand-on experience from industry ASIC design flow including RTL coding, debugging/verification, and supporting synthesis and timing closure.
NewASIC/RTL Design Engineer 5 TPI Global SolutionsASIC/RTL Design Engineer 5SAN JOSE, CAOur RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and silicon bring-up teams. SoC Architecture; knowledge and hand-on experience from industry ASIC design flow including RTL coding, debugging/verification, and supporting synthesis and timing closure.
Integration RTL Design Engineer Advanced Micro Devices, IncIntegration RTL Design EngineerSan Jose, CaliforniaFull ASIC Development Lifecycle: Drive design from concept through production silicon across all phases: specification, RTL coding, lint/CDC checks, synthesis, timing analysis, verification, physical design integration, and post-silicon validation. RTL Design & Microarchitecture: Author detailed micro-architecture specifications and own complete Verilog RTL implementation of major IP blocks, ensuring compliance with PPA (Performance, Power, Area) targets and timing requirements.
Senior RTL Design Engineer Advanced Micro Devices IncSenior RTL Design EngineerSan Jose, CAKEY RESPONSIBILITIES: RTL Design & Microarchitecture: Author detailed micro-architecture specifications and own complete Verilog RTL implementation of major IP blocks, ensuring compliance with PPA (Performance, Power, Area) targets and timing requirements. Full ASIC Development Lifecycle: Drive design from concept through production silicon across all phases: specification, RTL coding, lint/CDC checks, synthesis, timing analysis, verification, physical design integration, and post-silicon validation.
Staff Design Engineer GitHub IncStaff Design EngineerSan Francisco, CA$200,500–$372,300 / yearOR Bachelor's Degree in Industrial Design, Industrial Design, Graphic Design, Art, Computer Science, Human Factors Engineering, Human Computer Interaction, Information Architecture, or related field AND 8+ years experience in front-end engineering or development. OR Master's Degree in Industrial Design, Industrial Design, Graphic Design, Art, Computer Science, Human Factors Engineering, Human Computer Interaction, Information Architecture, or related field AND 6+ years experience in front-end engineering or development.
NewLead Design Engineer StepLead Design EngineerSan Mateo, CARemoteYou'll partner closely with Product Design and Engineering leadership to evolve our design platform, reduce friction in the product development process, and create a future where moving from an idea to production is faster, more reliable, and nearly lossless. Beast Industries spans digital media, consumer products, philanthropy, and new ventures, with an audience reach no consumer company has ever had — and Step is tasked with turning that reach into financial literacy and tools for the next generation at massive scale.
Opto-Mechanical Design Engineer KLA CorpOpto-Mechanical Design EngineerMilpitas, CA$141,300–$240,200 / yearEnabling the movement towards advanced chip design, KLA''s Global Products Group (GPG), which is responsible for creating all of KLA's metrology and inspection products, is looking for the best and the brightest research scientist, software engineers, application development engineers, and senior product technology process engineers. BBP flagship products include the 29xx and 39xx series which leverage Broadband Plasma technology to capture a wide range of defects with ultimate sensitivity at the optical inspection speeds needed for inline defect monitoring.
Principal Mechanical Design Engineer FormFactorPrincipal Mechanical Design EngineerLivermore, CaliforniaThe Mechanical Design Engineer is responsible for designing, developing, validating and delivering innovative mechanical design solutions for highly complex products and systems that support FormFactor’s semiconductor test and measurement products. FormFactor, Inc. (NASDAQ: FORM), is a leading provider of essential test and measurement technologies along the full semiconductor product life cycle — from characterization, modeling, reliability, and design de-bug, to qualification and production test.
Lead RTL Design Engineer EfficientAI CorpLead RTL Design EngineerSan Jose, CA$160,000–$250,000 / yearDeep proficiency in SystemVerilog for RTL - synthesis-clean, lint-clean, timing-aware; able to design complex state machines, arbiters, token flow controllers, and datapath logic from scratch. Solid understanding of parallel execution models: dataflow, SIMD, or systolic array architectures; familiarity with the hardware challenges of token-based firing-rule evaluation and producer-consumer synchronization.
CI/CD and Automation Infrastructure Engineer Tanisha SystemsCI/CD and Automation Infrastructure EngineerCupertino, CAFull timeRole Purpose: Build and maintain scalable CI, automation and dashboard infrastructure that enables reliable test execution across media, platform and device validation workflows. • Build and maintain XCTest/XCUITest frameworks, Jenkins pipelines and supporting test infrastructure.
Mechanical Design Engineer II Axon Enterprise IncMechanical Design Engineer IISan Francisco, CA$103,500–$165,600 / yearOur passionate leadership and cross-functional collaboration with product managers, electrical engineers, industrial designers, and manufacturing teams is vital to the success of the team and ensuring the safety of the general public for generations to come. Mechanical Design Engineers at Axon have full design ownership over next generation life-saving technology from conceptualization through production, whos work is highly visible to even the most senior executives.
Principal Analog Design Engineer Qorvo IncPrincipal Analog Design EngineerSan Jose, CA$170,300–$221,500 / yearIn this role, you will drive architecture, design, and validation of industry-leading analog power ICs, collaborating closely with cross-functional global teams to deliver world-class products that set new benchmarks in efficiency, reliability, and performance. Qorvo's fast-growing Power Management division is at the forefront of innovation in Power Loss Protection, PMICs, Motor Control, and Battery Management solutions, serving a diverse range of applications across Mobile, Consumer, IoT, and Industrial markets.
Staff Rotor/Hub Design Engineer Joby Aviation IncStaff Rotor/Hub Design EngineerSanta Cruz, CA$149,900–$250,000 / yearImagine a piloted air taxi that takes off vertically, then quietly carries you and your fellow passengers over the congested city streets below, enabling you to spend more time with the people and places that matter most. Design mechanical components and assemblies as well as associated test and manufacturing assemblies with an emphasis on structural integrity, manufacturability, reliability, and maintainability.
Physical Design Engineer - Full Chip Implementation Etched AIPhysical Design Engineer - Full Chip ImplementationSan Jose, CABacked by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Debug complex PV violations across layout, routing, macros, IP, power grid, rule decks, and tool or setup issues, and fix violations directly in layout using Innovus.