Senior HSIO Digital Design Engineer Samsung SemiconductorSenior HSIO Digital Design EngineerSan Jose, CaliforniaFull timeThe Location Group is an integral part of the broader SoC organization responsible for Exynos line of SoC products that cover all IPs including Application Processor, Communication Processor, Connectivity, GPU, NPU etc. and hence enables us to develop highly integrated products and optimize our solution to be the best in class. The team is responsible for all aspects of building products from concept (algorithm design) to productization – i.e., architecture definition, silicon design, algorithm and software development, platform integration, performance optimization, test and commercialization.
Senior FPGA Design Engineer Anello PhotonicsSenior FPGA Design EngineerSanta Clara, CAThe ideal candidate has a strong background and can lead FPGA and hardware designs from concept through production, working closely with electrical, firmware, software, manufacturing, and test teams to deliver reliable, manufacturable products. This role requires strong expertise in FPGA architecture, RTL design, hardware validation, and board-level product development, including hands-on experience with PCBA design and system integration.
Standard Cell Design Lead Substrate IncStandard Cell Design LeadSan Francisco, CA$150,000–$275,000 / yearThis role requires deep expertise in digital cell design, layout, and timing characterization combined with strong understanding of library requirements for digital design flows. At the intersection of advanced manufacturing and cutting-edge physics, we are developing technologies that will reshape the semiconductor industry and strengthen Americas technological leadership.
Digital IC Design Engineer NeuralinkDigital IC Design EngineerSouth San Francisco, CA$116,000–$233,800 / yearJob Description & Responsibilities: Our Digital IC Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred.
NewSenior Asic Design Engineer Cornelis NetworksSenior Asic Design EngineerSan Jose, CARemoteCornelis Networks is seeking talented Senior ASIC Design Engineers with deep expertise in one or more of the critical areas needed to develop world-class SoCs for deployment in high-performance computing, advanced data analytics, and AI interconnect solutions. Ideal candidates will have relevant experience in the networking domain, with proven expertise in 50G, 100G, and 400G Ethernet protocols-including TCP/IP, RDMA/RoCE, and IPSec-and their application in high-speed data processing and networking environments.
Staff SoC Design Engineer Waymo LLCStaff SoC Design EngineerMountain View, CA$251,000–$310,000 / yearYou will: Define the architecture and microarchitecture for Waymo''s next-generation autonomous vehicle SoCs, translating system-level requirements into detailed hardware specifications and RTL implementation, using your knowledge of how hardware, firmware, drivers, and compilers interact. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver-The World''s Most Experienced Driver-to improve access to mobility while saving thousands of lives now lost to traffic crashes.
Digital/RTL IC Design Engineer Omni Design Technologies IncDigital/RTL IC Design EngineerMilpitas, CAJob responsibilities include RTL design, verification, behavioral modelling, support and assist with synthesis, timing closure and P&R flow for the digital controller for high performance data converters in cutting edge technologies. We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Omni Design's IP cores and the rapidly emerging semiconductor embedded design business ecosystem.
Senior Digital/Mixed-Signal IC Design Engineer Omni Design Technologies IncSenior Digital/Mixed-Signal IC Design EngineerMilpitas, CAJob responsibilities include development and verification of the digital controller for high performance data converters, behavioral modeling, customer support, and to assist with synthesis and place-and-route flow for the digital controller for high performance data converters. We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Omni Design's IP cores and the rapidly emerging semiconductor embedded design business ecosystem.
Senior Digital Design Engineer SQL PagerSenior Digital Design EngineerSan Jose, CaliforniaHands on experience of ASIC design flow including RTL design, verification, Lint, CDC, LEC, logic synthesis, DFT, timing analysis, floor-planning, GLS, ECO, bring-up & lab debug. Preferred Qualifications: Hands on design experience in PCIe logical / link / transaction layers.
Principal/Senior Staff/Staff GPGPU Design Engineer SQL PagerPrincipal/Senior Staff/Staff GPGPU Design EngineerSan Francisco, CaliforniaNice to have Prior experience of a GPU functional blocks, including Caches• Knowledge in various DNN networks and their core ASIC implementations• Knowledge of Graphics/Compute APIs, such as CUDA/OpenCL• Knowledge of OS, software/hardware interface• Finite Precision Analysis of multi-layer compute processing pipeline. In-depth Knowledge of one of the parallel processing hardware architectures Neural Network Computation Flow on GPU/NPU Array/Vector/Systolic Processors SIMD/SIMT Processing Pipelines Base Jump manycore GPU cache hierarch and Latency-hiding with NoC Inter-connect bus fabric.
Digital Design Engineer SQL PagerDigital Design EngineerSan Jose, CaliforniaHands on experience of ASIC design flow including RTL design, verification, Lint, CDC, LEC, logic synthesis, DFT, timing analysis, floor-planning, GLS, ECO, bring-up & lab debug. Preferred Qualifications: Hands on design experience in PCIe logical / link / transaction layers.
Principle Design Engineer (ADC expertise) Monolithic Power SystemsPrinciple Design Engineer (ADC expertise)San Jose, CaliforniaAs a Principal design engineer, you will be responsible for the full cycle of our high-resolution ADC products, from architecture to design, simulation, layout supervision and post-layout verification. Self-motivated , willing to learn new technologies, & capable of working effectively within a group of individuals across multiple disciplines.
Design Verification Engineer - SoC EtchedDesign Verification Engineer - SoCSan Jose, CaliforniaBacked by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads.
Design Verification Engineer - SoC Etched.ai IncDesign Verification Engineer - SoCSan Jose, CAWith Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Staff Electrical Hardware Design Engineer IONQStaff Electrical Hardware Design EngineerSan Francisco, CA$145,920–$192,047 / yearPlease note that in the absence of confirming you are a U.S. Person for export control and government contracts work purposes, IonQ may choose not to apply for a license or decline to use a license exception (if available) for you to access export-controlled technology that may require authorization, and similarly, you may not qualify for government contracts work that requires U.S. Persons, and IonQ may decline to proceed with your application on those bases alone. IonQ's newest generation of quantum computers, the IonQ Tempo, is the latest in a line of cutting-edge systems that have been helping customers and partners including Amazon Web Services, and AstraZeneca achieve 20x performance results and accelerate innovation in drug discovery, materials science, financial modeling, logistics, cybersecurity, and defense.
NewDigital IC Design Engineer | BGP Texas Instruments IncDigital IC Design Engineer | BGPSanta Clara, CAFrom integrating ARM cores and working closely with the analog team in evolving new mixed signal and signal processing architectures, you''ll grow into embedded and DSP design while having the freedom to try new approaches and see them ship. Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, data center, personal electronics and communications equipment.
Digital Design Engineer HPDigital Design EngineerSan Francisco, CaliforniaAs a member of the team, you'll have the opportunity to contribute across the digital design process, develop your craft alongside experienced designers and engineers, and help create new interfaces, interactions, and experiences that shape our product roadmap. We’re especially interested in candidates who have experience or demonstrated interest in any of the following areas: High-fidelity prototyping using code or tools such as Origami Studio, SwiftUI, WebGL, JavaScript, or CSS.
Design Staff Atelier TenDesign StaffSan Francisco, CaliforniaWe’re an innovative multidisciplinary firm of environmental design consultants, building services engineers and lighting designers focused on delivering high-quality, award-winning building services and sustainable design within the built environment sector. Collaborate Atelier Ten’s integrated design groups to support the full range of our services, which include environmental design consulting, daylight and façade analysis, carbon analysis design and benchmarking.
Design Verification Engineer - Internal IP EtchedDesign Verification Engineer - Internal IPSan Jose, CaliforniaBacked by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. You will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready.
VP of Design OBE Worldwide LLCVP of DesignSan Francisco, CAReporting directly to the Chief Creative Officer, the Vice President, Design leads a multidisciplinary team of designers, including 3D/environmental specialists, graphic and UX/UI designers, and visual storytellers to craft immersive, culturally relevant brand experiences that compete at the level of top design agencies. The Vice President, Design is a senior creative leader responsible for elevating OBE's design excellence, shepherding all design disciplines, and overseeing the development and delivery of world-class experiential, spatial, and integrated design work.