Sr. Staff GaN Device Design Engineer Alpha & Omega SemiconductorSr. Staff GaN Device Design EngineerSunnyvale, CAFull timeAt Alpha and Omega Semiconductor (AOS), we design, develop and globally supply a broad range of power semiconductors, including a wide portfolio of Power MOSFET, IGBT, IPM, TVS, GaN/SiC, Power IC and Digital Power products. You will find our products in everyday applications including personal computers, graphic cards, gaming consoles, TVs, home appliances, smart phones, power tools, and more!
Graphics Cache Hierarchy Design Verification Engineer Apple IncGraphics Cache Hierarchy Design Verification EngineerSanta Clara, CAThe Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL verification of graphics memory subsystem units including Caches, Memory Management Unit, Interconnects and Link interface units. You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions.
Design Characterization Engineer OmnivisionDesign Characterization EngineerSanta Clara, California$110,600–$140,000 / yearWork cross‑functionally with process, applications, production, and quality teams to transition new designs into production and resolve yield, reliability, and overall product quality issues. In this role, you will characterize and optimize CMOS image sensor performance, collaborate closely across engineering disciplines, and help deliver industry‑leading sensor products with exceptional quality.
CPU Design Timing Engineer Apple IncCPU Design Timing EngineerSanta Clara, CAWork extensively with CPU micro-architects and Implementation engineers to drive timing closure for the CPU.Minimum BS and 3+ years of relevant experience Experience with static timing analysis, noise analysis, and fixing noise in designs Experience with variation modeling Experience with TCL and either Perl or PythonPrior experience performing timing analysis in high speed digital designs such as CPUs or other similar designs Experience in a static timing analysis tool such as PrimeTime/Tempus Knowledge of physical design tools and methodology including logic synthesis, PnR, parasitic extraction, and logic equivalence Understanding of deep sub-micron technologies and scaling trends Working knowledge of CPU microarchitecture Possess data parsing, analysis and representation/plotting skills. In this role, you will be responsible for all aspects of timing including working with the implementation and RTL teams on timing changes, helping with construction/modify timing flows, timing analysis, and timing closure.
Hardware Design & Prototyping Engineer Apple IncHardware Design & Prototyping EngineerCupertino, CA3+ years of experience with PCB design, including high speed signal routing, mixed-signal analog/digital design, and component selection. Do you deeply understand all the unique challenges of working on prototype test solutions for bleeding edge camera image sensors?.
Digital Design Engineer E-SpaceDigital Design EngineerSaratoga, CAOur team members have a strong sense of dedication and responsibility; this includes a strong commitment to our mission to create an entirely new suite of global capabilities to improve lives, business efficiencies and build a smarter planet. We’re intentional, we’re unapologetically curious and we’re 100% committed to innovate space-based communications and deliver actionable intelligence that will expand global economies, protect space and our planet and enhance our overall quality of life.
Digital Design Specialist: Structural Engineering LPADigital Design Specialist: Structural EngineeringSan Jose, CaliforniaLPA’s structural engineers have been repeatedly recognized by our peers in the structural engineering community for our innovative and technically challenging designs, including receiving SEAOC’s Excellence in Structural Engineering and People’s Choice Award in 2021 along with multiple national engineering awards from NCSEA and AISC. Opportunities to propose and lead projects that impact your local community, including more than $1 million since 2015 in Habitat for Humanity builds, scholarships, and other pro bono community projects.
Creative Director, Design Meta Platforms IncCreative Director, DesignBurlingame, CAYou will partner with product designers, content designers, industrial designers, motion designers, creative technologists, and engineers to ship high-quality digital retail experiences for our expanding hardware portfolio. We have developed best-in-class collaboration models with agencies and our cross-company creative network to ensure a consistent and effective creative narrative for work that reaches an audience across the globe due to the scale of our products.
Staff ASIC Design Verification Engineer Google LLCStaff ASIC Design Verification EngineerSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing with key teams working on the development of our TPUs Vertex AI for Google Cloud Google Global Networking Data Center operations systems research and much more. Were the driving force behind Googles groundbreaking innovations empowering the development of our cutting-edge AI models delivering unparalleled computing power to global services and providing the essential platforms that enable developers to build the future.
Design Verification Engineer Broadcom CorporationDesign Verification EngineerSan Jose, CA$120,000–$192,000 / year2) Understanding the architecture and implementation of these chips and coming up with in depth test plans for verifying various key networking features such as L2/L3 traffic streaming, traffic management, scheduling and shaping of traffic, latency and performance characterization of chips and systems. 3) Developing verification environments including testbenches and verification API's associated with the chip architecture to enable testing of various features within the chips as well as scripts and Makefiles as required to run the environment in various tool chains.
Design Engineer - Flow Development Broadcom CorporationDesign Engineer - Flow DevelopmentSan Jose, CAThe candidate must have the ability to prioritize well, communicate clearly, proactively deliver practical and quality solutions on-time, work well with external and internal partners, and possess advanced IC design engineering skills. Our group's mission is to provide an advanced timing sign-off flow to Broadcom's chip teams with the goal of achieving best in class solutions with high yield and fully optimized margins.
Sr. ASIC Design Verification Engineer (Silicon Engineering) SpaceXSr. ASIC Design Verification Engineer (Silicon Engineering)Palo Alto, CA$175,000–$280,000 / yearWe are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
Nvidia 2027 Internships: Hardware Design For Test (Dft) NvidiaNvidia 2027 Internships: Hardware Design For Test (Dft)Santa Clara, CACourse or internship experience related to the following areas could be required: Design for Test (DFT), Digital Design, Test Architecture and DFT Planning, Static Timing Analysis (STA), Pre-Silicon and Post-Silicon Issue Debug. Our work in AI and digital twins is transforming the world's largest industries and profoundly impacting society - from gaming to robotics, self-driving cars to life-saving healthcare, climate change to virtual worlds where we can all connect and create.
Silicon Design Verification Engineer GoogleSilicon Design Verification EngineerMountain View, CADevelop and enhance constrained-random verification environments using SystemVerilog and universal verification methodology (UVM), or formally verify designs using SystemVerilog Assertions (SVA). Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Science, a related field, or equivalent practical experience.
Design Engineer - Flow Development Broadcom IncDesign Engineer - Flow DevelopmentSan Jose, CAThe candidate must have the ability to prioritize well, communicate clearly, proactively deliver practical and quality solutions on-time, work well with external and internal partners, and possess advanced IC design engineering skills. Our group's mission is to provide an advanced timing sign-off flow to Broadcom's chip teams with the goal of achieving best in class solutions with high yield and fully optimized margins.
NVIDIA 2027 Internships: Hardware Design for Test (DFT) NVIDIA CorpNVIDIA 2027 Internships: Hardware Design for Test (DFT)Santa Clara, CACourse or internship experience related to the following areas could be required: Design for Test (DFT), Digital Design, Test Architecture and DFT Planning, Static Timing Analysis (STA), Pre-Silicon and Post-Silicon Issue Debug. Our work in AI and digital twins is transforming the world's largest industries and profoundly impacting society - from gaming to robotics, self-driving cars to life-saving healthcare, climate change to virtual worlds where we can all connect and create.
Analog/Mixed Signal Verilog Modeling Design Engineer Broadcom CorporationAnalog/Mixed Signal Verilog Modeling Design EngineerSan Jose, CAJob Description: Responsible for developing Digital-Mixed Signal (DMS) models of analog IPs such as touch controller AFEs, wireless power charging, health sensing AFE and satellite AFEs using SystemVerilog language. As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.
Digital Design Verification Engineer Broadcom CorporationDigital Design Verification EngineerSan Jose, CAAs a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. Job Description: The ideal candidate has a proven track record of working on setting up testbenches for Design Verification using UVM on large designs.
NewSenior Digital Design Engineer NvidiaSenior Digital Design EngineerSanta Clara, CAWhat you'll be doing: As a key member of the NVLink Fusion design team, you will analyze the architectural requirements, perform the trade-off analysis for implementation, and deliver high performance, area and power efficient RTL Blocks. We have some of the most forward-thinking and hardworking people in the world working for us, and, due to outstanding growth, our special engineering teams are growing fast.
VP of Design OBE Worldwide LLCVP of DesignSan Francisco, CAReporting directly to the Chief Creative Officer, the Vice President, Design leads a multidisciplinary team of designers, including 3D/environmental specialists, graphic and UX/UI designers, and visual storytellers to craft immersive, culturally relevant brand experiences that compete at the level of top design agencies. The Vice President, Design is a senior creative leader responsible for elevating OBE's design excellence, shepherding all design disciplines, and overseeing the development and delivery of world-class experiential, spatial, and integrated design work.