SystemVerilog, Matlab, Python, VerilogAMS) Hands-on experience in advanced CMOS technologies, design with FinFet technology Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization Experience in the following areas is a plus Concepts of timing closure and related industry tools (e.g., Nanotime, Primetime) Experience in lab testing of high-speed serial I/O, debug and data analysis techniques Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) Skills in scripting and automation to improve efficiency. Proven understanding and experience of designing analog mixed-signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters Solid understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques Good grasp and understanding of digitally assisted analog design concepts (e.g.