Sr. Electrical Design Engineer - System Architecture KLA CorporationSr. Electrical Design Engineer - System ArchitectureMilpitas, CA$141,300–$240,200 / yearEnabling the movement towards advanced chip design, KLA's Global Products Group (GPG), which is responsible for creating all of KLA's metrology and inspection products, is looking for the best and the brightest research scientist, software engineers, application development engineers, and senior product technology process engineers. This role will define and drive the system-level architecture for power and signal distribution across the tool, with primary ownership of interconnection diagrams, IO rack concepts, motion-drive interfaces, and cable architecture.
NewStaff Architect, Onboard Compute Architecture Muon SpaceStaff Architect, Onboard Compute ArchitectureSan Jose, CA$210,000–$234,000 / yearTo conform to U.S. Government export regulations applicable to that information, applicant must either be (A) a U.S. person, defined as a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (green card holder), (iii) refugee under 8 U.S.C. § 1157, or (iv) asylee under 8 U.S.C. § 1158, (B) eligible to access the export controlled information without a required export authorization, or (C) eligible and reasonably likely to obtain the required export authorization from the applicable U.S. government agency. You'll be the technical center of gravity across FPGA, GPU, CPU, and onboard networking, pulling together architectural threads from across the team and shaping a coherent, mission-flexible compute platform that will fly on Muon spacecraft for years to come.
Intern, System Architecture PsiQuantum CorpIntern, System ArchitecturePalo Alto, CAOur application, software, and industry teams work directly with leading Fortune 500 companies-including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical-to prepare quantum solutions for real-world impact. By leveraging the advanced semiconductor manufacturing industry-including partners like GlobalFoundries-we use the same high-volume processes that already produce billions of chips for telecom and consumer electronics.
HDD Servo Processing Subsystem Architecture Lead Western Digital CorpHDD Servo Processing Subsystem Architecture LeadSan Jose, CADrive evolution of the servo compute tooling ecosystem-including internal compiler, real-time compute platform simulator, Renode-based system simulation, debug and diagnostics tools, and profiling/debug flows-to support multi-cluster, multi-stream characterization and debugging by servo, manufacturing, and validation teams. Define and maintain a future-state servo real-time compute architecture and ISA that scales from single to multiple concurrent data streams and supports concurrent control of multiple actuators and heads, with explicit guidance to SoC and servo teams on power, area, and performance trade-offs.
NewStaff Architect, Onboard Compute Architecture Muon Space incStaff Architect, Onboard Compute ArchitectureSan Jose, CA$210,000–$234,000 / yearTo conform to U.S. Government export regulations applicable to that information, applicant must either be (A) a U.S. person, defined as a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (green card holder), (iii) refugee under 8 U.S.C. § 1157, or (iv) asylee under 8 U.S.C. § 1158, (B) eligible to access the export controlled information without a required export authorization, or (C) eligible and reasonably likely to obtain the required export authorization from the applicable U.S. government agency. You''ll be the technical center of gravity across FPGA, GPU, CPU, and onboard networking, pulling together architectural threads from across the team and shaping a coherent, mission-flexible compute platform that will fly on Muon spacecraft for years to come.
Director, Data Engineering & Architecture Remote Ceribell IncDirector, Data Engineering & Architecture RemoteSunnyvale, CARemote$210,000–$272,000 / yearThe Ceribell System is a novel, point-of-care electroencephalography ("EEG") platform specifically designed to address the unmet needs of patients in the acute care setting, and is being used in hundreds of community hospitals, large academic facilities and major IDN''s across the country. This role bears the primary responsibility for facilitating communication and execution across Commercial, Engineering, Financial, Infrastructure, and Security teams, ensuring that our systems drive organizational efficiency, effectiveness, and flexibility.
NewIO and Memory Sub-Sytem Architecture RambusIO and Memory Sub-Sytem ArchitectureSan Jose, California$180,000–$334,200 / yearOur Memory Interface Division is dedicated to developing all products related to Server and Client Memory Modules , and your contributions will be instrumental in developing solutions DDR6/LPDDR6 /HBM solutions for Server and Client systems. As a Seni or Principal Architect of Memory & IO Sub-system , you’ll play a pivotal role in leading the architecture, design, and development of next generation of DRAM sub -system solutions for server and high-performance computing applications .
Architecture Project Manager Aro HomesArchitecture Project ManagerMountain View, CaliforniaThis role includes collaborating with our Development Manager working with local Authorities Having Jurisdiction (AHJ’s) and state permitting agencies to capture, analyze, and incorporate changes and improvements into Aro’s working models and documentation. Track and manage product RFI’s, red-lines and design feedback from the manufacturing and site operations teams, across various documentation types, such as permit documents, shop drawings, product installation literature, etc.
Design Architecture Professional Career Level Jacobs Solutions IncDesign Architecture Professional Career LevelSan Francisco, CAKuala Lumpur, All MY Regions, Malaysia | 43213 | Advanced Manufacturing | Drafting and Design | Multiple Locations. Wiodcy projektant / wiodca projektant sieci wod-kan - projekty advanced facilities: semiconductors.
Principal Enterprise Architecture: Product-to-Market StratAcuity Staffing Partners IncPrincipal Enterprise Architecture: Product-to-MarketPleasanton, CA$70–$100 / hourIn terms of professional development, Everforth Apex hosts an on-demand training program, provides access to certification prep and a library of technical and leadership courses/books/seminars once you have 6+ months of tenure, and certification discounts and other perks to associations that include CompTIA and IIBA. Technical Skills: Deep knowledge of merchandising planning processes including Line Planning, Buy Planning, Allocation, Visual Mapping, Space Planning, Size & Pack, and Consumer Insights.
Cyber Network Security Architecture - Senior Manager Deloitte Touche Tohmatsu LtdCyber Network Security Architecture - Senior ManagerSan Francisco, CA$163,400–$322,100 / year8+ years of experience in the design and architecture of enterprise-level technical stacks, including VPNs, CDN solutions, Load Balancers, Subnetting, Next-Generation firewall design, and highly scalable security solutions like Secure Access Service Edge (SASE) technologies. Our purpose comes through in our work with clients that enables impact and value in their organizations, as well as through our own investments, commitments, and actions across areas that help drive positive outcomes for our communities.
Secure Systems Engineer - Platform Architecture Apple IncSecure Systems Engineer - Platform ArchitectureCupertino, CAIn this role, you will define the architecture and oversee the operation of distributed web services that set and enforce security policy for the development, manufacture, deployment, and operation of Apple products, ultimately driving continuous security improvements for these products. (e.g., secure boot, hardware roots of trust, designing and developing secure web services or scalable infrastructure for highly available applications, etc.) Experience with common programming languages such as Python, Go or C/C++.
Machine Learning Architect, Platform Architecture Apple IncMachine Learning Architect, Platform ArchitectureCupertino, CAPyTorch) and efficient implementations of machine learning algorithmsMS or PhD in EE/CE/CS or related field 20+ years of relevant experience Experience in optimizing and deploying ML models and/or runtime frameworks in production inference/training environments Experience designing experiments to evaluate ML model optimization techniques Ability to prototype algorithms on CPU/GPU/Neural Engine, analyze performance metrics, and create high-level complexity models Verbal and written communication skills for collaborating with partner teams Understanding of compilers. You'll collaborate with engineers across Apple to design how our technologies work in unison, drive development of our renowned system-on-a-chip architecture and forward-looking prototype systems.
Sr. Staff Technical Program Manager, Vehicle Systems Architecture Rivian and Volkswagen Group TechnologiesSr. Staff Technical Program Manager, Vehicle Systems ArchitecturePalo Alto, CaliforniaRivian and Volkswagen Group Technologies may share your Candidate Personal Data with (i) internal personnel who have a need to know such information in order to perform their duties, including individuals on our People Team, Finance, Legal, and the team(s) with the position(s) for which you are applying; (ii) Rivian and Volkswagen Group Technologies affiliates; and (iii) Rivian and Volkswagen Group Technologies’ service providers, including providers of background checks, staffing services, and cloud services. Rivian and Volkswagen Group Technologies may use your Candidate Personal Data for the purposes of (i) tracking interactions with our recruiting system; (ii) carrying out, analyzing and improving our application and recruitment process, including assessing you and your application and conducting employment, background and reference checks; (iii) establishing an employment relationship or entering into an employment contract with you; (iv) complying with our legal, regulatory and corporate governance obligations; (v) record keeping; (vi) ensuring network and information security and preventing fraud; and (vii) as otherwise required or permitted by applicable law.
Segment Marketing & System Architecture Cecp - Vice President ST MicroelectronicsSegment Marketing & System Architecture Cecp - Vice PresidentSanta Clara, CA$250,000–$300,000 / yearSTMicroelectronics is seeking a Communications, Equipment, Computer, and Peripheral (CECP) Global Segment Marketing Leader with special focus on Data Centers to define and drive the long-term strategy, system architecture vision, and market positioning for ST's CECP - Data Center focused vertical. The successful candidate will act as a key influencer across Product Groups, Regional Sales, and Executive Leadership, shaping both ST's near-term penetration into current Data Center opportunities and long-term investments aligned with future workloads, architectures, and customer roadmaps.
NewIVI Hardware Architecture - Technical Specialist Ford Motor CoIVI Hardware Architecture - Technical SpecialistPalo Alto, CA$115,500–$218,100 / yearProficiency with relevant lab and engineering tools (oscilloscopes, logic analyzers, spectrum/network/power analyzers, electronic loads, thermal cameras, environmental chambers, CAN/Ethernet analysis tools), electrical simulation tools (LTspice, MATLAB/Simulink, Mathcad, HyperLynx, SI/PI tools), PCB design, fabrication, assembly, manufacturing test, and DFM/DFT practices, and basic scripting or automation (Python, MATLAB, or similar) for lab automation, data reduction, and test reporting. Strong ability to read, interpret, and technically review schematics, PCB layouts, data sheets, and validation reports, with deep knowledge of high-performance compute ECU hardware - processors/SoCs, memory and storage interfaces (LPDDR, eMMC/UFS), power delivery and sequencing, thermal management, signal/power integrity, and high-speed vehicle interfaces (Automotive Ethernet, CAN/CAN FD, LIN, USB, PCIe, display).
Display System Architect, Platform Architecture Apple IncDisplay System Architect, Platform ArchitectureCupertino, CAIn this highly visible role, you will lead the architecture of SoC display subsystem, including memory fabric interface, data pipe flow controls, memory compression, display interfaces, etc. Join this team, and you'll collaborate with engineers across Apple to develop algorithms and architectures that help build the flawless technology experiences we're known for worldwide!
Senior Director, Solutions Architecture — Americas CohereSenior Director, Solutions Architecture — AmericasSan Francisco, CaliforniaLeadership Experience: 15+ years in Solutions Architecture, Solutions Engineering, Technical Consulting or Enterprise Architecture, including 7+ years leading customer-facing technical teams, and a record of developing people into senior and leadership roles. You will set direction for the function, sit on the Solution Architecture leadership team alongside the regional leaders for EMEA and Asia Pacific, and contribute to company-wide decisions with your peers across Sales, Product and Engineering.
Display Architecture Validation Engineer Apple IncDisplay Architecture Validation EngineerCupertino, CAAs a Display Architecture Validation Engineer, you are responsible for the architecture and requirements validation for the display sub-system of Apple's application processor chip (System on a Chip, or SOC).Develop bit-accurate display architecture models Develop test suites and image quality validation tools to execute display architecture validation plan Perform subjective and objective quality evaluations Collaborate with hardware and system architects to develop architecture validation plan Collaborate with chip architecture, silicon design/verification, display engineering and software teams for product bring-upBachelor's degree Experience in digital signal processing and its applications to image or video processingMS in Electrical Engineering or Computer Science and 10+ years of relevant industry experience Understanding of digital image/video processing Understanding of image quality metrics, and experience performing objective and subjective image quality analysis Understanding of color science and human visual system Understanding of image processing pipeline such as display, camera, video codec, or computer vision Strong software engineering and programming skills in C++ and scripting languages, such as Lua and Python Effective interpersonal skills and ability to work across groups Strong written and verbal communication skills. In this highly visible role, you will collaborate with Display and SoC architects, SoC design and verification teams, display technology and software teams to support SoC display architecture validation across a diverse range of Apple products!
Principal IC Digital Design - SoC Design/Micro-architecture Marvell Technology IncPrincipal IC Digital Design - SoC Design/Micro-architectureSanta Clara, CA$158,600–$237,600 / yearEssential Duties and Responsibilities Own RTL design, implementation, and integration of complex blocks or subsystems Define and influence block-level and subsystem-level micro-architecture Develop high-quality, synthesizable RTL using Verilog/SystemVerilog Ensure design correctness through lint, CDC, RDC, and peer reviews Collaborate with verification, validation, Firmware and synthesis/STA, and physical design teams Identify and resolve complex functional, timing, power and integration issues Contribute to digital design methodologies and best practices Mentor and guide junior engineers Participate in design reviews and tape-out readiness What We're Looking For Required Qualifications Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field 12+ years of experience in digital IC or SoC RTL design Deep expertise in RTL using system verilog design and micro-architecture Strong understanding of clocking, reset, and power-aware design, SoC architecture, processor cores, memory, peripheral interfaces through hand on prior experience Hands-on experience with lint, CDC, and RDC analysis Proven ownership and track record of block or subsystem delivery on production silicon with aggressive development schedules. Preferred Qualifications Experience with large-scale SoC integration Familiarity with low-power design techniques Exposure to synthesis, STA, or physical design flows Experience mentoring engineers or leading technical reviews Expected Base Pay Range (USD) 158,600 - 237,600, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.