NewArchitectural Designer III - PreK-12 Harley Ellis DevereauxArchitectural Designer III - PreK-12San Francisco, CAArchitectural Designer III is a mid-level technical architecture role that is responsible for assisting PreK-12 sector project teams from early design through construction under the supervision of a seasoned Architect and/or Project Designer. Job Description Position Summary: HED is seeking a passionate Architectural Designer III to join our growing PreK–12 Education practice in our San Francisco Bay Area, Sacramento, or Los Angeles offices.
NewAutoCAD Design/Drafter Auriga CorporationAutoCAD Design/DrafterMilpitas, CAJob Description AURIGA JOB POSTING (Auriga Website: www.aurigacorp.com) Auriga Corporation was established in 1990, to provide high-quality design, engineering and project management services for Electric Power, Telecommunication and Information Technology systems. Proven work experience in preparing computer-aided design of drawings and other graphic material for Electrical, Mechanical, Civil, Structural or Architectural designers using AutoCAD, Map 3D, Civil 3D and/or Revit.
NewDrafter/Designer Vizion Utility PartnersDrafter/DesignerPleasanton, CAAdditionally, the Drafter/Designer is responsible for preparing the drawing sets which may include gas, electric, phone, and cable television infrastructure for utility companies. Proficiency in CADD using the latest version of AutoCAD 2D and 3D programs with a strong knowledge of civil site development and constructive layout, grading and underground infrastructure.
Principal Engineer, SerDes AMS Design and Architecture Ayar LabsPrincipal Engineer, SerDes AMS Design and ArchitectureSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD, MediaTek and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Key Responsibilities: Architect the high-speed optical PHY of our next-generation product: TX path, RX path, clocking, and mixed-signal control loops against a system-level link budget shared with the photonics and laser teams.
Designer II, Interior Architecture & Design Ware MalcombDesigner II, Interior Architecture & DesignPleasanton, CAEstablished in 1972, Ware Malcomb is a dynamic, forward-thinking commercial real estate design firm providing professional architecture, interior design, civil engineering, branding, building measurement, structural engineering and MEP engineering services to clients throughout the world. The firm is also ranked among the top 10 Architecture/Engineering firms in Engineering News-Record’s Top 500 Design Firms and the Top 30 Interior Design Firms in Interior Design magazine’s Top 100 Giants.
Fellow, AI Software Architecture Advanced Micro Devices, IncFellow, AI Software ArchitectureSan Jose, CaliforniaAMD AI Group is seeking a highly influential technical leader for the role of AMD Fellow, OneROCm — driving a unified ROCm software stack across AMD’s broad product portfolio, including Instinct, Radeon, Ryzen, Embedded, Game Consoles, and Autonomous Driving platforms. As a s uccessful candidate , y ou are recognized for technical excellence, cross-functional leadership, and the ability to drive company-wide innovation through collaboration across silicon, system software, AI/ML frameworks, libraries, and application enablement teams.
Hardware System Architecture Fellow - AI & Data Center Networking Advanced Micro Devices, IncHardware System Architecture Fellow - AI & Data Center NetworkingSanta Clara, CaliforniaThe Fellow operates with enterprise‑scale technical authority, shaping multi‑generation system architectures and influencing execution across ASIC, packaging, board, optics, power, thermal, mechanical, firmware, and manufacturing domains, without direct people management responsibility. This role provides system‑level technical leadership, spanning architecture definition, cross‑domain trade‑offs, and resolution of the most complex hardware challenges across AI‑NICs, DPUs, switches, and rack‑scale networking solutions.
Fellow - Adaptive SoC / FPGA architecture Advanced Micro Devices, IncFellow - Adaptive SoC / FPGA architectureSan Jose, CaliforniaAs a senior technical leader, you will shape the long‑term vision for bitstream architecture, configuration flows, runtime reconfiguration, debug observability, and system integration, translating customer requirements across Emulation & Prototyping, AI, Data Center, Embedded, and Automotive into differentiated FPGA capabilities. This role will own the architecture for FPGA configuration, readback, and Partial Reconfiguration (PR), enabling scalable, secure, and flexible deployment of programmable logic in heterogeneous SoC and chiplet environments.
Sr Staff Engineer Instrument Architecture Becton Dickinson Medical DevicesSr Staff Engineer Instrument ArchitectureMilpitas, CaliforniaWaters collaborates with analytical laboratories around the world to advance the release of effective, high-quality medicines, assure the safety of food and water, and drive better patient outcomes by detecting diseases earlier, managing routine infections, and combatting growing antibiotic resistance. Data Pipeline Architecture: Expert knowledge of high-throughput data processing architectures, including DMA (Direct Memory Access) transfers, FIFO buffering strategies, and high-speed bus interfaces (PCIe, USB 3.0, Gigabit Ethernet).
Reference Architecture & Content Specialist: 26-01743 Akraya Inc.Reference Architecture & Content Specialist: 26-01743Pleasanton, CARemote$90–$92 / hourMost recently, we were recognized Stevie Employer of the Year 2025, SIA Best Staffing Firm to work for 2025, Inc 5000 Best Workspaces in US (2025 & 2024) and Glassdoor's Best Places to Work (2023 & 2022)! Primary Skills: Diagramming tools (advanced), SIR module knowledge (intermediate), VR module knowledge (intermediate), IRM module knowledge (intermediate), Technical writing (advanced).
Head of System Domain Architecture ASMLHead of System Domain ArchitectureSan Jose, CaliforniaIn this role, you are responsible for ensuring end-to-end domain architectural coherence across relevant products and module generations, while driving the functional roadmap to deliver fit-for-purpose, cost-effective, and maintainable solutions including: Delivering system level domain specific SEG documents and provide input for design rules. Ensures Accountability: The ability to create a clear accountability system where ownership, expectations, and decision rights are explicit; drives consistent follow-through on commitments across teams; and addresses performance or delivery gaps quickly and constructively, while reinforcing a culture of ownership, learning, and measurable outcomes.
Technical Program Manager, Architecture TenstorrentTechnical Program Manager, ArchitectureSanta Clara, CAAs the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. The Technical Program Manager will drive the end-to-end execution of next-generation SoCs, from early architecture through RTL, verification, DFT, physical design, tape-out, and post-silicon validation.
Research Engineer - Model Architectures ZyphraResearch Engineer - Model ArchitecturesSan Francisco, CaliforniaWe strongly value new and crazy ideas and are very willing to bet big on new ideas. Generally, a joy in inventing and seriously assessing ‘crazy’ ideas, and the ability to have a unique perspective on things.
Architecture & Performance Modeling Engineer EriduArchitecture & Performance Modeling EngineerSaratoga, CaliforniaYou will collaborate closely with system architects, chip designers, and cross-functional teams to evaluate design trade-offs, identify bottlenecks, and deliver actionable insights that shape the future of large-scale AI networking. The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.
Sr. Staff Engineer, Electrical Link Architecture Ayar LabsSr. Staff Engineer, Electrical Link ArchitectureSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD, Mediatek and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Joining our Link Design and Architecture team, you will own the electrical-side modeling that drives our silicon photonics I/O platform — the analog front end, the DSP that closes the link, and the models that make circuits and photonics co-simulate end-to-end.
Sr. Staff Electrical Engineer, Vehicle Architecture ALSOSr. Staff Electrical Engineer, Vehicle ArchitecturePalo Alto, CaliforniaWe’re a passionate team of builders, dreamers, doers and innovators, focused on creating entirely new (not to mention, innovative and delightful) vertically integrated, small EVs designed to meet the global mobility challenges of today and tomorrow. Staff Electrical Engineer, Vehicle Architecture to drive the electrical architecture of our micro-mobility platforms, covering power distribution, energy storage, compute, sensors, lighting, safety systems, and connectivity.
Senior Director, Architecture Research Lab Samsung SemiconductorSenior Director, Architecture Research LabSan Jose, CA$246,000–$430,000 / yearThe role is responsible for end‑to‑end co‑design of AI workloads, system‑level modeling, hardware platforms, and high‑performance processors that leverage Samsung's advanced memory technologies to eliminate capacity, bandwidth, and large‑scale communication bottlenecks. Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.
Senior Engineer, Performance Architecture Samsung SemiconductorSenior Engineer, Performance ArchitectureSan Jose, CA$138,000–$206,000 / yearBS in Computer/Electrical Engineering or Computer Science with 5+ years of working experiences in silicon development or MS in Computer/Electrical Engineering or Computer Science with 3+ years of relevant working experience or PhD and 0+ years of relevant working experience preferred. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems.
NewArchitecture Lab Technician Academy of Art UniversityArchitecture Lab TechnicianSan Francisco, CaliforniaThe Architecture Lab Technician role is technology-based service position that supports the Architecture, Interior Architecture, and Landscape Architecture students & staff onsite at 601 Brannan Street, primarily through tech-support and printing supervision. All applicants will be considered regardless of age, Aids or HIV positive status, marital status, domestic partnership, medical condition or genetic characteristics, race or national origin, pregnancy, religion, sex, gender identity, gender or sexual orientation, name change, citizenship, physical or mental disability, veteran status or other status protected by federal, state, local or other law.
SoC Power Architecture Engineer - Processor Subsystem E-SpaceSoC Power Architecture Engineer - Processor SubsystemSaratoga, CA$150,000–$220,000 / yearThis role focuses on partitioning and structuring power domains within complex processor subsystems, with a strong emphasis on the aggressive duty cycling, ultra-low standby power, and constrained energy budgets inherent to satellite IoT end-node devices. We are seeking an experienced SoC Power Architecture Engineer to define, design, and implement power domain architectures for ASIC-based processor subsystems targeting satellite IoT connectivity applications.