Salesforce Data Cloud & AI Tech Architect (Tech Architecture/Solution Architecture) Accenture PlcSalesforce Data Cloud & AI Tech Architect (Tech Architecture/Solution Architecture)Mountain View, CASolution design ownership - lead end-to-end solution design across assigned workstreams, including data model, integration patterns, security model, and platform configuration; keep SDDs, architecture decision records, and data flow diagrams current throughout delivery. You translate what senior architects design into what delivery teams build - owning solution design documents, leading technical workstreams, and making sure the architecture holds through the full program lifecycle.
Internship, Systems Architecture & Integration Engineer, LV Architecture (Winter/Spring 2027) Tesla IncInternship, Systems Architecture & Integration Engineer, LV Architecture (Winter/Spring 2027)Palo Alto, CA$20–$55 / hourOur year-round program places the best students in positions where they will grow technically, professionally, and personally through their experience working closely with their Manager, Mentor, and team. Hands-on technical experience debugging complex subsystems involving network microprocessors and software-controlled electrical or electromechanical devices.
Designer II, Interior Architecture & Design Ware MalcombDesigner II, Interior Architecture & DesignPleasanton, CAEstablished in 1972, Ware Malcomb is a dynamic, forward-thinking commercial real estate design firm providing professional architecture, interior design, civil engineering, branding, building measurement, structural engineering and MEP engineering services to clients throughout the world. The firm is also ranked among the top 10 Architecture/Engineering firms in Engineering News-Record's Top 500 Design Firms and the Top 30 Interior Design Firms in Interior Design magazine's Top 100 Giants.
Principal Engineer, SerDes AMS Design and Architecture Ayar LabsPrincipal Engineer, SerDes AMS Design and ArchitectureSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD, MediaTek and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Key Responsibilities: Architect the high-speed optical PHY of our next-generation product: TX path, RX path, clocking, and mixed-signal control loops against a system-level link budget shared with the photonics and laser teams.
Designer III, Interior Architecture & Design Ware MalcombDesigner III, Interior Architecture & DesignCAEstablished in 1972, Ware Malcomb is a dynamic, forward-thinking commercial real estate design firm providing professional architecture, interior design, civil engineering, branding, building measurement, structural engineering and MEP engineering services to clients throughout the world. You will support project execution through Design Development (DD), Construction Documents (CD), and Contract Administration (CA), including submittals and furniture selection, while mentoring junior team members and coordinating project efforts under the general direction of a licensed interior designer.
Designer /Team Leader-Architecture GHD Group Pty LtdDesigner /Team Leader-ArchitectureSAN FRANCISCO, CA$136,000–$230,000 / yearServe as Senior Technical Lead for complex medium to large design projects, including locally administered, nationally administered, private/federally funded and design-build projects. Demonstrated experience leading teams in the delivery of complex architectural projects within the US, including municipal, state or federally funded projects.
Architecture Energy Modeling Engineer - New College Grad 2026 NvidiaArchitecture Energy Modeling Engineer - New College Grad 2026Santa Clara, CAYou will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design teams to study and implement energy modeling techniques for NVIDIA's next generation GPUs, CPUs and Tegra SOCs. Our team is responsible for researching, developing, and deploying methodologies to help NVIDIA's products become more energy efficient; and is responsible for building energy models that integrate into architectural simulators, RTL simulation, emulation and silicon platforms.
Senior Architecture Energy Modeling Engineer NvidiaSenior Architecture Energy Modeling EngineerSanta Clara, CAYou will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design teams to study and implement energy modeling techniques for NVIDIA's next generation GPUs, CPUs and Tegra SOCs. Our team is responsible for researching, developing, and deploying methodologies to help NVIDIA's products become more energy efficient; and is responsible for building energy models that integrate into architectural simulators, RTL simulation, emulation and silicon platforms.
NewResearch Scientist, (Privacy-Preserving Large-Scale Model Training & Architecture Optimization) TikTok IncResearch Scientist, (Privacy-Preserving Large-Scale Model Training & Architecture Optimization)San Jose, CAPrivacy-preserving and compliant training pipelines You will work on end-to-end training architecture design, from model-parallel execution and GPU efficiency to robust, fault-tolerant, privacy-aware training infrastructure. Design and optimize large-scale training architectures for diffusion-based and unified generative models (e.g., DiT, Rectified Flow, hybrid AR + diffusion systems).
Senior Director Power Architecture, Datacenter AI Qualcomm IncSenior Director Power Architecture, Datacenter AISanta Clara, CA$249,900–$375,800 / yearWork closely with supporting teams in design, architecture, emulation, firmware, design verification and software to ensure readiness for first silicon arrival, evaluation of AI and system performance upon silicon arrival, and evaluation of critical AI workloads. Drive technical innovation to enhance capabilities in system power validation including tools and script development, technical and procedural methodology enhancement, and various internal and cross-functional technical initiatives.
Staff Electrical Architecture System Engineer Zoox IncStaff Electrical Architecture System EngineerFoster City, CA$204,000–$280,000 / yearWe are looking for an engineer that is passionate about developing a ground breaking Robotaxi, has a strong system engineering background, has extensive experience in vehicle network, power distribution, power modes and ECU function distribution. Led by the Principal Architect, The Zoox Electrical Architecture Team is responsible for developing the power distribution, network topology and logical organization of ECUs to create the optimal autonomous robotaxi.
CPU Architecture Performance Engineer (RISC V) Qualcomm IncCPU Architecture Performance Engineer (RISC V)Santa Clara, CA$167,100–$250,700 / yearMinimum Qualifications: Bachelor''s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. Master''s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
CPU Micro-Architecture and RTL Design Engineer (RISC-V) Qualcomm IncCPU Micro-Architecture and RTL Design Engineer (RISC-V)Santa Clara, CA$167,100–$250,700 / yearThorough knowledge of microprocessor architecture including expertise in one or more of the following areas: instruction fetch and decode, branch prediction, instruction scheduling and register renaming, out-of-order execution, integer and floating point execution, load/store execution, prefetching, cache and memory subsystems. Minimum Qualifications: Bachelor''s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Sr. Staff Engineer, Electrical Link Architecture Ayar Labs IncSr. Staff Engineer, Electrical Link ArchitectureSan Jose, CA$190,000–$223,000 / yearBacked by industry giants like NVIDIA, AMD, Mediatek and Intel and manufactured in partnership with the world''s leading semiconductor ecosystem, Ayar Labs'' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Joining our Link Design and Architecture team, you will own the electrical-side modeling that drives our silicon photonics I/O platform - the analog front end, the DSP that closes the link, and the models that make circuits and photonics co-simulate end-to-end.
Principal / Director - Robotics System Architecture Lead Qualcomm IncPrincipal / Director - Robotics System Architecture LeadSanta Clara, CA$242,300–$363,500 / yearGuide signal processing and sensor pipeline design (ISP, filtering, denoising, feature extraction, sensor fusion inputs), partnering with silicon and algorithm teams to meet accuracy, latency, and reliability targets. The ideal candidate is a recognized technical leader with deep robotics systems experience, strong architectural judgment, and the ability to influence cross-functional teams and long-term platform roadmaps.
Architecture & Performance Modeling Engineer EriduArchitecture & Performance Modeling EngineerSaratoga, CaliforniaYou will collaborate closely with system architects, chip designers, and cross-functional teams to evaluate design trade-offs, identify bottlenecks, and deliver actionable insights that shape the future of large-scale AI networking. The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.
NewStaff Engineer, Architecture & Performance Research Engineer for Data Center and Agentic AI CPU Samsung SemiconductorStaff Engineer, Architecture & Performance Research Engineer for Data Center and Agentic AI CPUSan Jose, CA$163,000–$253,000 / yearThe role offers an opportunity to work across the full spectrum of architecture research—from workload and performance analysis, microarchitectural innovation, and architectural modeling to implementation and silicon validation—while helping shape new methodologies for how future CPUs are designed. The role offers broad ownership across architectural domains, with the opportunity to define new research directions, influence CPU architecture strategy, and drive ideas that can deliver meaningful performance gains in real hardware.
Sr. Staff Electrical Engineer, Vehicle Architecture ALSOSr. Staff Electrical Engineer, Vehicle ArchitecturePalo Alto, California$250,000–$280,000 / yearWe’re a passionate team of builders, dreamers, doers and innovators, focused on creating entirely new (not to mention, innovative and delightful) vertically integrated, small EVs designed to meet the global mobility challenges of today and tomorrow. Staff Electrical Engineer, Vehicle Architecture to drive the electrical architecture of our micro-mobility platforms, covering power distribution, energy storage, compute, sensors, lighting, safety systems, and connectivity.
NewSenior Engineer, Architecture & Performance Research Engineer for Data Center and Agentic AI CPU Samsung SemiconductorSenior Engineer, Architecture & Performance Research Engineer for Data Center and Agentic AI CPUSan Jose, CA$138,000–$206,000 / yearThe role offers an opportunity to work across the full spectrum of architecture research—from workload and performance analysis, microarchitectural innovation, and architectural modeling to implementation and silicon validation—while helping shape new methodologies for how future CPUs are designed. We develop and apply AI-driven methodologies to accelerate architectural exploration, broaden the design space we can investigate, and quickly iterate from ideas to implementation and silicon validation.
Sr. Staff Engineer, Electrical Link Architecture Ayar LabsSr. Staff Engineer, Electrical Link ArchitectureSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD, Mediatek and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Joining our Link Design and Architecture team, you will own the electrical-side modeling that drives our silicon photonics I/O platform — the analog front end, the DSP that closes the link, and the models that make circuits and photonics co-simulate end-to-end.