NewPlatform Architecture Engineer, Geforce NOW NvidiaPlatform Architecture Engineer, Geforce NOWSanta Clara, CANVIDIA's GeForce NOW service is built on top of our GPU technology, including our proprietary GPU architectures and software optimizations allowing efficient and high-quality gaming experience even at high resolutions. What we need to see: To be successful in this role, you should have: Bachelors, Masters, PhD, or equivalent experience in relevant fields (Computer Engineering, Computer Science, Electrical Engineering, AI).
Staff Software Engineer - Computer Vision Array LabsStaff Software Engineer - Computer VisionRedwood City, CaliforniaITAR Requirements To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Our goal is to make 3D geospatial intelligence dramatically more accessible, useful, and operationally relevant for customers in mapping, infrastructure, disaster response, defense, intelligence, energy, telecommunications, mining, and other industries that depend on understanding the changing Earth.
RFIC Layout Designer (RFIC Engineering) SpaceXRFIC Layout Designer (RFIC Engineering)Palo Alto, CAWe are seeking motivated, proactive, and intellectually curious engineers who will work alongside world-class cross-disciplinary teams (systems architecture, ASIC design, firmware, pre-silicon verification, post-silicon validation, product engineering, manufacturing/production, and more). In this role, you will be on a team working on multiple silicon projects that are driving more integration, lower power, mixed signal architectures and advanced silicon technology for deployment in space and ground infrastructures.
Hardware Engineering (Electrical) Technical Lead CiscoHardware Engineering (Electrical) Technical LeadSan Jose, CaliforniaThe applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $171,600.00 - $281,800.00 Non-Metro New York state & Washington state: $151,300.00 - $250,900.00 * For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. As part of the wireless engineering group, you will collaborate with multi-functional teams—including Hardware Design, Antenna/Compliance, Power Engineering, Signal Integrity, EMC/EMI, and Mechanical Design—to deliver industry-leading wireless products.
Rfic Layout Designer (Rfic Engineering) Space Exploration TechnologiesRfic Layout Designer (Rfic Engineering)Palo Alto, CA$115,000–$155,000 / yearWe are seeking motivated, proactive, and intellectually curious engineers who will work alongside world-class cross-disciplinary teams (systems architecture, ASIC design, firmware, pre-silicon verification, post-silicon validation, product engineering, manufacturing/production, and more). RESPONSIBILITIES: Work with the integrated circuit designers and chip leads to determine the chip floor plan; this includes strategies for power and ground distribution as well as working with packaging engineer to determine pad locations.
Electrical & Computer Engineer (Temporary/Contract) Ceribell, IncElectrical & Computer Engineer (Temporary/Contract)Sunnyvale, CA$85–$100 / hourWe have working prototypes of most peripherals on various development platforms (Raspberry Pi and Arduino) and need an experienced embedded engineer to port, integrate, bring up, and test these on the target host, then help drive the design toward manufacturing readiness. The Ceribell System is a novel, point-of-care electroencephalography (“EEG”) platform specifically designed to address the unmet needs of patients in the acute care setting, and is being used in hundreds of community hospitals, large academic facilities and major IDN's across the country.
Electrical & Computer Engineer (Temporary/Contract) CeribellElectrical & Computer Engineer (Temporary/Contract)Sunnyvale, CA$85–$100 / hourWe have working prototypes of most peripherals on various development platforms (Raspberry Pi and Arduino) and need an experienced embedded engineer to port, integrate, bring up, and test these on the target host, then help drive the design toward manufacturing readiness. The Ceribell System is a novel, point-of-care electroencephalography ("EEG") platform specifically designed to address the unmet needs of patients in the acute care setting, and is being used in hundreds of community hospitals, large academic facilities and major IDN's across the country.
NewNvidia 2027 Internships: Deep Learning Computer Architecture NvidiaNvidia 2027 Internships: Deep Learning Computer ArchitectureSanta Clara, CADepending on the internship role, prior experience or knowledge requirements could include the following programming skills and technologies: C, C++, Perl, CUDA, GPU Computing (CUDA, OpenCL, OpenACC), Deep Learning Frameworks (PyTorch, TensorFlow, Caffe), HPC (MPI, OpenMP). Course or internship experience related to the following areas could be required: Experience in one or more of these Focus Areas: GPU Architecture, CPU Architecture, Deep Learning, GPU Computing, Parallel Programming, or High-Performance Computing Systems.
Senior Engineer, Software Engineering ComriseSenior Engineer, Software EngineeringSan Jose, CA$70–$75 / hourFull timeThis role requires a strong understanding of system-level verification, including analyzing requirements, creating detailed test cases, defining test protocols, executing manual and automated tests, documenting results, and troubleshooting defects through root-cause analysis. Collaboration with engineering, quality, and project teams is essential to align testing activities, communicate timelines and results, and continuously improve test methods and overall product quality.
NewPhysical Design Engineer Altera SemiconductorPhysical Design EngineerSan Jose, California$100,000–$110,000 / yearWith more than four decades of industry‑leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. Support aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
CPU Design Architect / Principal Digital Design Engineer BaiduCPU Design Architect / Principal Digital Design EngineerSunnyvale, CaliforniaContribute ideas for advanced CPU performance features - analyze workloads in details, identify performance bottlenecks and opportunities, bring a data driven approach to tradeoffs in CPU design, derive architecture and micro-architecture to design/model implantation team, and bring ideas to successful silicon. This position will work with multi-nation teams in leading-edge process node and be involved in: - Perform CPU development and design integration for MIPS CPU subsystem.
Lead Product Planner Altera SemiconductorLead Product PlannerSan Jose, CaliforniaWith more than four decades of industry‑leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. Leadership - influences, inclusiveness, defines and drive decisions in a proactive, assertive manner, ability to articulate ideas and concepts in a compelling and targeted manner to promote change.
NewAutomation & Robotics Engineering Spring Co-Op Johnson & JohnsonAutomation & Robotics Engineering Spring Co-OpSanta Clara, CA$27–$61 / hourStudents currently on CPT, OPT, or STEM OPT usually requires future sponsorship for long term employment and do not meet the requirements for this program unless eligible for an alternative long-term status that does not require company sponsorship. Through our expertise in Innovative Medicine and MedTech, we are uniquely positioned to innovate across the full spectrum of healthcare solutions today to deliver the breakthroughs of tomorrow, and profoundly impact health for humanity.
Senior Engineer, Performance Architecture Samsung SemiconductorSenior Engineer, Performance ArchitectureSan Jose, CA$138,000–$206,000 / yearBS in Computer/Electrical Engineering or Computer Science with 5+ years of working experiences in silicon development or MS in Computer/Electrical Engineering or Computer Science with 3+ years of relevant working experience or PhD and 0+ years of relevant working experience preferred. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems.
Hardware Engineering Technician Velo3DHardware Engineering TechnicianFremont, CaliforniaWorking closely with engineering and manufacturing teams, the technician provides technical feedback to improve product designs, assembly processes, and documentation, participates in continuous improvement initiatives, and contributes to the successful execution of cross-functional projects. The VELO3D award-winning solution includes an integrated offering of hardware and software: Sapphire® metal AM production printer, Flow print preparation software, Assure quality assurance and control system, and an integrated manufacturing process that runs throughout the printing operation.
Software Engineering Manager, Applications Echo NeurotechnologiesSoftware Engineering Manager, ApplicationsSan Francisco, CaliforniaEcho Neurotechnologies is an exciting new startup in the Brain-Computer Interface (BCI) space, driving innovation through advanced hardware engineering and AI solutions. We are seeking an experienced Software Engineering Manager to coordinate development of mobile & desktop applications and their integrations with devices, cloud, and ML.
Senior Director, Reliability Engineering NvidiaSenior Director, Reliability EngineeringSanta Clara, CAThis is a role for a deeply technical leader who can operate at both the physics-of-failure level and the executive level - someone who brings rigor to reliability modeling, drives design decisions through data, and builds organizations capable of sustaining NVIDIA's pace of innovation. You will own the reliability engineering strategy for NVIDIA's broad boards and systems product portfolio, lead globally distributed teams and labs, and influence design, manufacturing, and supply chain decisions at scale.
Inference Optimization Intern – Performance Modeling Institute of Foundation ModelsInference Optimization Intern – Performance ModelingSunnyvale, CaliforniaCurrently pursuing a degree in Computer Science, Computer Engineering, Electrical Engineering, Artificial Intelligence, High-Performance Computing, or a related quantitative discipline. By combining deep expertise in machine learning, systems engineering, and hardware optimization, we build scalable AI solutions that drive scientific discovery and real-world impact.
Senior AI Builder EarninSenior AI BuilderMountain View, CA$228,000–$279,000 / yearA Note on AI in the Hiring Process: EarnIn may use Artificial Intelligence (AI)-powered tools during the hiring process, including tools that generate summaries or notes for interviewers, review resumes, assist with scheduling, or help identify themes across candidate responses and profiles for a given role. You'll work at the intersection of platform engineering, developer experience, and applied AI - partnering with architects, domain leads,, and product engineers to build the tools, patterns, and guardrails that make AI adoption fast, safe, and durable.
Sr. ASIC EDA Workflow Engineer TensordyneSr. ASIC EDA Workflow EngineerSunnyvale, CaliforniaAs a valued senior member of our ASIC team, you will guide and assist your colleagues to help improve and invent EDA workflows within a fast-paced, agile HPC development environment that utilizes EDA tools from external companies like Cadence and as well as internally developed workflows. Experience leading the development and support for compilation, build automation, testing, packaging and installation project generators that build object files like either CMake, GNU make, and/or Ninja, as well as experience with CI/CD and modern Git Branching workflows.