Reporting as an Owner's Representative, you will partner with external architecture and engineering firms to develop, review, and verify architectural solutions for new wafer fabs, assembly‑test facilities, cleanrooms, and other large‑scale projects (green‑field and brown‑field) worldwide. Lead concept, schematic, design‑development, and construction‑document phases for all architectural aspects of semiconductor facilities, including: Cleanroom layout, classification, pressure‑cascade design, and gowning areas.