1+ years' experience with advanced packaging technologies such as flip chip, chiplets, 2.5D/3DIC, fan-out, hybrid bonding, interposers, HBM integration, advanced substrates, or die-to-die interconnects. The role is suited for candidates with expertise in either packaging process integration or modeling/simulation, with a focus on evaluating new architectures, materials, interconnects, reliability risks, and manufacturability trade-offs for future products.