Senior Software Engineer – Network Observability Clockwork.ioSenior Software Engineer – Network ObservabilityPalo Alto, CA$140,000–$210,000 / yearClockwork is pioneering a software-driven approach to AI fabrics by delivering cross-stack observability to catch and quickly resolve problems, workload fault tolerance to keep jobs running through failures, and performance acceleration that dynamically routes and paces traffic to avoid congestion. In addition to cash compensation, this role is eligible to participate in the company's equity program, which may include stock options granted in accordance with the company's equity plan and subject to approval and applicable vesting schedules.
Staff HiL SW Infrastructure Engineer Agility RoboticsStaff HiL SW Infrastructure EngineerFremont, CA$190,000–$247,000 / yearAgility's commercially deployed humanoids operate alongside teams in warehouses, manufacturing facilities, and distribution centers—tackling physically demanding and repetitive tasks while enabling workers to focus on higher-value work. Fault Injection Implementation: Programmatically control Fault Injection Units (FIU) to simulate short-to-battery, short-to-ground, and open-circuit conditions on critical robot signals.
Senior Software Engineer, Networking NvidiaSenior Software Engineer, NetworkingSanta Clara, CAWe are working on products and solutions on various Ethernet switching platforms as well as SmartNICs like the NVIDIA BlueField data processing unit (DPU) which ignites outstanding innovation for modern data centers by offloading, accelerating, and isolating a broad range of services. What you'll be doing: Designing, developing, testing and maintaining new functionality and improvements to existing functionality related to forwarding and offload of routing, ACLs, QOS, CLAG, NAT, policy-based routing, VxLAN-EVPN and so on.
Senior Applied Machine Learning Engineer - Vlsi Design NvidiaSenior Applied Machine Learning Engineer - Vlsi DesignSanta Clara, CAWhat you'll be doing: Work within a multi-functional team on projects involving pre-silicon and post-silicon hardware design data, circuit optimization, SPICE correlation, and AI systems for EDA/design automation. Our team builds AI-driven software systems for circuit design, combining automation algorithms, DL models and agentic workflows to accelerate end-to-end design automation.
Senior Product Manager - AI Inference Performance NvidiaSenior Product Manager - AI Inference PerformanceSanta Clara, CAAgentic and Multi-Turn Workloads: Define the performance strategy for agentic applications, where long-running sessions, tool-call stalls, and unpredictable output lengths break the assumptions built into single-turn serving. The work spans the entire inference stack - optimization techniques, the frameworks that deliver them; and the benchmarking and operational tooling customers rely on to trust the results.
Senior Asic Design Engineer NvidiaSenior Asic Design EngineerSanta Clara, CAThis position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. What you'll be doing: As a key member of the GPU Design team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
NewSenior Platform Engineer, Design Automation NvidiaSenior Platform Engineer, Design AutomationSanta Clara, CAYou will join a small team that builds and operates the software platform used by NVIDIA chip-design teams to launch, monitor, debug, and improve large-scale semiconductor design workflows. Our systems coordinate hundreds of thousands of design jobs per day across global datacenters, supporting more than 1,000 designers working on GPU, CPU, SoC, and networking products.
NewLead Systems Software Test Engineer - CSP Engagements NvidiaLead Systems Software Test Engineer - CSP EngagementsSanta Clara, CANVIDIA is seeking a Senior Systems Software test (lead) Engineer to join our Cloud Service Provider (CSP) Engagements team, focusing on ML software stack validation for Datacenter products such as GB200 and Vera Rubin. This role combines deep technical expertise from cluster to rack scale full-stack validation with customer-facing responsibilities, enabling cloud service providers with next-generation high-performance training and inference platforms.
NewDistinguished Software Architect - Deep Learning And HPC Communications NvidiaDistinguished Software Architect - Deep Learning And HPC CommunicationsSanta Clara, CAExpert in following areas: HPC, parallel programming models (MPI, SHMEM), at least one communication runtime (MPI, NCCL, NVSHMEM, OpenSHMEM, UCX, UCC), computer and system architecture, GPU architecture and CUDA. Deep understanding of various aspects of high performance networking from prior work experience: network technologies (Infiniband, Ethernet), network design, network topologies, network debug and performance analysis.
NewSenior Tegra Software Engineer NvidiaSenior Tegra Software EngineerSanta Clara, CAWays to stand out from the crowd: Experience with GPU and SOC technology, advanced architecture development topics such as Security Enclave, Secure Boot, Root of Trust, Runtime Security services, Confidential Compute, Cryptography, and more. The base salary range is 152,000 USD - 241,500 USD for Level 3, and 184,000 USD - 287,500 USD for Level 4. You will also be eligible for equity and benefits.
NewSenior Verification Engineer NvidiaSenior Verification EngineerSanta Clara, CAStrong hands-on expertise in UVM, SystemVerilog, Verilog, Python, and C/C++, with a passion for root-causing complex issues; experience with constrained-random stimulus, functional coverage, assertion-based verification, and C/C++-based testbenches - ideally on shipped silicon. Domain knowledge of display pipelines: protocols (DisplayPort, HDMI, MIPI DSI/CSI), MMU interaction with ISO clients, and system low-power features (clock gating, power domains, retention, entry/exit sequences).
NewSenior Compute Platform Engineer, LSF NvidiaSenior Compute Platform Engineer, LSFSanta Clara, CAWhat you'll be doing: Owning scheduler behavior across 15-25 federated LSF cells, including mbatchd and mbschd tuning, scheduling cycle analysis, and the contention patterns that appear as cells approach host-count ceilings. Partnering directly with CAD and methodology teams on workloads that break normal assumptions: 500GB+ memory jobs, interactive-versus-batch contention, and tape-out crunch bursts.
NewSenior Software Engineer, Chips System Software NvidiaSenior Software Engineer, Chips System SoftwareSanta Clara, CAYou will design and develop key aspects of our Chip specific kernel drivers and embedded software, with a strong focus on Linux kernel development, Core OS enablement, Chip and Platform Bring-up, and automation across both pre-silicon and silicon platforms. If you're a self-driven engineer with a passion for low-level software, Linux kernel development, platform architecture, and end-to-end ownership, we'd love to have you join our team and help shape the future of computing.
NewResearch Engineer, Interactive World Models NvidiaResearch Engineer, Interactive World ModelsSanta Clara, CAContributions to an open-source ML project or developer platform, such as implementing model support, improving performance, building tests and benchmarks, fixing difficult issues, writing documentation, or helping users adopt the technology. Advance the production-ready world model frontier by working with researchers on few-step distillation, causal or autoregressive generation, reward fine-tuning, action conditioning, and long-horizon spatiotemporal memory and consistency.
Principal CPU Architect - High-Performance And Physical Design NvidiaPrincipal CPU Architect - High-Performance And Physical DesignSanta Clara, CAThe CPU architecture team is driving innovations that integrate seamlessly with NVIDIA's broader technology stack, enabling faster AI model training, agentic use-cases, efficient data processing, and scalable cloud deployments. With the introduction of the Grace CPU Superchip, and more recently, the announcement of the Vera CPU, NVIDIA has expanded into the CPU server market, complementing our world-class GPUs and SoCs.
NewSenior Asic Verification Engineer NvidiaSenior Asic Verification EngineerSanta Clara, CAWe are a team of hardworking engineers working across the micro-architecture, design, verification, implementation, and post silicon validation of groundbreaking NVIDIA automotive and gaming console chips. Joining this team means stepping into a dynamic, innovation-driven environment where your contributions will shape products spanning consumer graphics, autonomous vehicles, and the rapidly evolving realm of artificial intelligence.
NewArchitecture Energy Modeling Engineer - New College Grad 2026 NvidiaArchitecture Energy Modeling Engineer - New College Grad 2026Santa Clara, CAYou will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design teams to study and implement energy modeling techniques for NVIDIA's next generation GPUs, CPUs and Tegra SOCs. Our team is responsible for researching, developing, and deploying methodologies to help NVIDIA's products become more energy efficient; and is responsible for building energy models that integrate into architectural simulators, RTL simulation, emulation and silicon platforms.
NewSenior Architecture Energy Modeling Engineer NvidiaSenior Architecture Energy Modeling EngineerSanta Clara, CAYou will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design teams to study and implement energy modeling techniques for NVIDIA's next generation GPUs, CPUs and Tegra SOCs. Our team is responsible for researching, developing, and deploying methodologies to help NVIDIA's products become more energy efficient; and is responsible for building energy models that integrate into architectural simulators, RTL simulation, emulation and silicon platforms.
Design Verification Engineer, Principal Veracity Software IncDesign Verification Engineer, PrincipalSanta Clara, CAFull Name: Degree (BS/MS/PhD) – Major, University & Completion Year: Total Design Verification Experience (Years): Total SoC Verification Experience (Years): Experience leading Design Verification implementation and tape-out of complex SoCs (Yes/No – details): SystemVerilog Experience (Years – details): UVM Experience (Years – details): Experience writing detailed Verification Test Plans (Yes/No – details): Experience building Constrained Random Verification Environments (Yes/No – details): Experience with Coverage-Driven Verification & Coverage Closure (Yes/No – details): Experience with Python and/or Perl Scripting (Years – details): Experience using EDA Verification Tools (Specify tools): Experience with Object-Oriented Programming/Design (Yes/No – details): Linux Experience (Years – details): C++ Programming Experience (Years – details): ARM Assembly Experience (Yes/No – details): Experience with Multi-Core SoC Verification and Boot Code Verification (Yes/No – details): Experience leading verification teams or project-level verification activities (Yes/No – details): Understanding of Networking Protocols (Ethernet, TCP/IP, Switching, etc.) (Yes/No – details): Motivation / Reason for interest in this position: Contact Number: Email ID: LinkedIn Profile URL: Full Address (Street, City, State, Zip Code): Notice Period: Current Work Authorization Status: Expected Salary: Are you able to relocate on your own expenses and work Santa Clara, CA - Onsite?. · BS Computer Engineering, Electrical Engineering, or Computer Science with 10+ years of verification and firmware and software development experience (or MS/PhD with 5+ years experience).
Design Engineer III eTeam Inc.Design Engineer IIISunnyvale, CAPerform power/performance measurement across design stages using PPA RTL, PtPx tool; correlate results with post silicon and feed back to design/power-modeling teams. About the role: Design Verification engineer for wearables silicon accelerator IPs testbench development, coverage-driven verification, RTL debug, and power/performance measurement.