Design Verification Engineer-System Verilog/UVM Advanced Micro Devices, IncDesign Verification Engineer-System Verilog/UVMSan Jose, CaliforniaWe push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Working across a multi-site, global engineering organization, you will drive high-quality verification execution from feature definition through silicon readiness. .
Silicon Design Verification Engineer-FPGA/System Verilog Advanced Micro Devices, IncSilicon Design Verification Engineer-FPGA/System VerilogSan Jose, CaliforniaYou will plan, develop, and execute comprehensive verification strategies across complex digital subsystems, working closely with cross-functional engineering teams to deliver robust, bug-free designs. You bring strong analytical and debugging skills, communicate effectively across globally distributed teams, and are motivated to learn new technologies while taking ownership of difficult problems.
Sr Principal Design Engineer Cadence Design Systems IncSr Principal Design EngineerSan Jose, CA$154,000–$286,000 / yearYou will bridge the gap between customers, Applications Engineering (AE), Product Engineering (PE), and R&D - develop impactful customer solutions, delivering deep R&D technical support, and pioneering innovative verification methodologies to solve our customers' most complex architectural and high-Speed Protocol challenges. In this highly visible, customer-facing role, you will work directly with industry-leading semiconductor and systems companies to develop and deploy Cadence's market-leading hardware emulation and FPGA prototyping platforms.
Silicon Design Verification Engineer Advanced Micro Devices IncSilicon Design Verification EngineerSan Jose, CAYou will plan, develop, and execute comprehensive verification strategies across complex digital subsystems, working closely with cross-functional engineering teams to deliver robust, bug-free designs. You bring strong analytical and debugging skills, communicate effectively across globally distributed teams, and are motivated to learn new technologies while taking ownership of difficult problems.
CPU Core Design Verification Testbench Lead Tenstorrent IncCPU Core Design Verification Testbench LeadSanta Clara, CAAs the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. How Tenstorrent applies AI across the DV lifecycle - from test planning and stimulus through regression debug, triage, and coverage analysis - using workflows designed to keep context tight and outputs auditable.
VP of Design OBE Worldwide LLCVP of DesignSan Francisco, CAReporting directly to the Chief Creative Officer, the Vice President, Design leads a multidisciplinary team of designers, including 3D/environmental specialists, graphic and UX/UI designers, and visual storytellers to craft immersive, culturally relevant brand experiences that compete at the level of top design agencies. The Vice President, Design is a senior creative leader responsible for elevating OBE's design excellence, shepherding all design disciplines, and overseeing the development and delivery of world-class experiential, spatial, and integrated design work.
Senior Manager, System Integration - Silicon Co-Design Group NVIDIA CorpSenior Manager, System Integration - Silicon Co-Design GroupSanta Clara, CAWhat we need to see: Bachelor's or Master's in Electrical or Computer Engineering (or equivalent experience), plus over 12+ overall years of system-level post-silicon bring-up and debug experience, including 5 years leading technical teams, with shipped silicon. Direct experience finding critical silicon issues before software was production-ready - including building or scaling wide-area or in-system test programs that ran in production.
Board Design Engineer TaaraBoard Design EngineerSunnyvale, CaliforniaThe position seeks highly-motivated individuals that enjoy working in a small dynamic team environment, with a passion for solving challenging problems that can lead to high-impact advances in technology. They’ll work closely across teams including photonics integrated circuits, electronic integrated circuit, mechanical design and software in developing the board designs.
Design Verification Engineer, Principal The Employee ConnectDesign Verification Engineer, PrincipalSanta Clara, CaliforniaThe ideal candidate brings deep expertise in functional verification methodologies, a strong background in chip-level DV, and the ability to influence design and verification strategy across a high-performing engineering team. A leading global semiconductor company is seeking a Principal Design Verification Engineer to lead complex verification efforts for next-generation silicon designs.
DFT (Design For Test) Engineer Etched.ai IncDFT (Design For Test) EngineerSan Jose, CABenefits • Medical, dental, and vision packages with generous premium coverage • $500 per month credit for waiving medical benefits • Housing subsidy of $2k per month for those living within walking distance of the office • Relocation support for those moving to San Jose (Santana Row) • Various wellness benefits covering fitness, mental health, and more • Daily lunch + dinner in our office. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
Sr. FPGA Design Engineer KLA CorpSr. FPGA Design EngineerMilpitas, CA$141,300–$240,200 / yearEnabling the movement towards advanced chip design, KLA''s Global Products Group (GPG), which is responsible for creating all of KLA's metrology and inspection products, is looking for the best and the brightest research scientist, software engineers, application development engineers, and senior product technology process engineers. BBP flagship products include the 29xx and 39xx series which leverage Broadband Plasma technology to capture a wide range of defects with ultimate sensitivity at the optical inspection speeds needed for inline defect monitoring.
TPU RTL Design Engineer GoogleTPU RTL Design EngineerSunnyvale, CAFull timeFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We're the driving team behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.
Design Verification Engineer (Silicon Engineering) SpaceXDesign Verification Engineer (Silicon Engineering)Palo Alto, CA$135,000–$155,000 / yearWe are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) SpaceXSr. SOC/ASIC Physical Design Engineer (Silicon Engineering)Sunnyvale, CA$170,000–$230,000 / yearWe are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
Sr. Soc/Asic Physical Design Engineer (Silicon Engineering) Space Exploration TechnologiesSr. Soc/Asic Physical Design Engineer (Silicon Engineering)Sunnyvale, CA$175,000–$280,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Sr. ASIC Design Verification Engineer (Silicon Engineering) SpaceXSr. ASIC Design Verification Engineer (Silicon Engineering)Palo Alto, CA$175,000–$280,000 / yearWe are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
Design Verification Engineer (Silicon Engineering) Space Exploration TechnologiesDesign Verification Engineer (Silicon Engineering)Palo Alto, CA$135,000–$155,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Sr. Asic Design Verification Engineer (Silicon Engineering) Space Exploration TechnologiesSr. Asic Design Verification Engineer (Silicon Engineering)Palo Alto, CA$175,000–$280,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Principal Design Verification Engineer (Silicon Engineering) SpaceXPrincipal Design Verification Engineer (Silicon Engineering)Sunnyvale, CA$210,000–$310,000 / yearWe are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
TPU SoC Design Engineer, Cloud GoogleTPU SoC Design Engineer, CloudSunnyvale, CAFull timeFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We're the driving channel behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.